Hello everyone,
I have a question regarding the settings of the Channel Status and Control register of the LS1046A.
According to table 9-16. Mode, edge and level selection the following settings is possible:
DECAPEN COMBINE CPWMS MSnB:MSnA ELSnB:ELSnA Mode Configuration
X X X XX 00 Pin not used for FTM—revert the channel pin to general purpose I/O or other peripheral control
What happens when I set this mode (ELSnB:ELSnA=00)? How will these pins controlled now?
The multiplex settings allow to select some pins for either FTM or GPIO and it would be great if it was possbile to regain some pins as GPIO using this FTM mode.
Thanks!
Regards
Ferdinand
Look at the Section 3.4.1 of the LS1046a Reference Manual:
https://www.nxp.com/webapp/Download?colCode=LS1046ARM
This Section shows pin multiplexing using RCW.
Have a great day,
Pavel Chubakov
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Hello Pavel,
thanks for the link. However, the information seems contratictory.
Using the mux settings in the RCW I can set, as an example, all the UART related pins to work as FTM signals. What happens if I now set the corresponding ELSnB:ELSnA bits in the FTMx_CnSC to 00? What is the function of the pins then? The way I understand it the FTM will no longer control theses pins. Are they now regular GPIOs?
Regards
Ferdinand