Thank you for your reply.
I'm sorry, I reply late.
 yipingwang
		
			yipingwang
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		Please configure the switch setting on your custom board to configure it as hard-coded RCW, then try whether CCS still failed at reset_to_debug.
If the problem remain, further investigating about JTAG interface hardware design is needed.
Thank you for your reply.
This problem remain yet. We checked our JTAG hardware interface design.
"nRESET" signal is connected to TRST direct.
Is this connection a problem?
 yipingwang
		
			yipingwang
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		When you execute the Connection Diagnostics action, then CodeWarrior Connection Server(CCS) will be popped up automatically on the right bottom of the Windows task bar.
Please open CCS console, type "log v", then execute Connection Diagnostics again, the low level CCS log will be printed out, please capture the log to me to do more investigation.
 yipingwang
		
			yipingwang
		
		
		
		
		
		
		
		
	
			
		
		
			
					
		In your CCS log, it failed at "reset_to_debug".
Please make sure SERDES REF CLK is set to 100 MHz, set rcw_src to the hard-coded RCW option matching the board's DIP SW regarding SYSCLK and differential/single-ended clock source
If this problem remains, please check your JTAG hardware interface design.
Please refer to "Figure 18. JTAG interface connection" in the attached application note.
Please refer to "5.28 JTAG pin termination recommendations" in the attached app note.
