Content originally posted in LPCWare by andrea-peter on Mon May 21 07:35:38 MST 2012 Hi, I have an LPC4350-db1 board. I'm trying to run something on both cores M4 and M0.
First, a question: - the LPC4350 user manual says that the M0 is reset by default (M0APP_RST, bit 24 of RESET_CTRL1), but when I start debugging a project built for M4, the corresponding bit in RESET_ACTIVE_STATUS1 has value 1 (no reset), does that mean that both cores run by default at startup? In that case, how does the startup process work with both cores running work? Do they just look up their shadow pointers and every core goes its way?
The real problem: - I'm not able to run both cores, that means, I can either run something on the M4 or on the M0 (depends what target is set in the project setup). (BTW, I'm using Red Suite 4 NXP edition) I tried to follow some examples (like "IPC_Blinking from" Diolan http://www.lpc4350.com/projects/lpc-4350/wiki/Software_Examples)
What I figured out is that the following steps are required:
- build a project for M0 with its main.c
convert the M0's .afx image to .bin with: arm-none-eabi-objcopy*-O*binary*IPC_Blinking_M0.axf*IPC_Blinking_M0.bin
and then to .h with binary2array.exe IPC_Blinking_M0.bin IPC_Blinking_M0.h (this program is included in the examples)
#include the M0_image.h in the M4's project
- build a project for M4 with its main
the code (on the M4) to start the M0 does something like this: - reset M0 - copy image to imgAddr - M0_shadow_pointer <= imgAddr - "unreset" M0
M0APP_RST goes to 0 when resetting M0 end back to 1 when "unresetting", but somehow the M0 doesn't want to wake up. Am I missing something?
Andrea.
P.S. just received Red Probe+, it's quite awesome for inspecting peripheral registers, I'm curious to see what else it can do :)
Content originally posted in LPCWare by andrea-peter on Mon Jun 04 10:07:52 MST 2012 Ok, It works, thanks to red code's (new) wiki site about dual core projects.
Content originally posted in LPCWare by CodeRedSupport on Tue May 22 04:57:21 MST 2012 At a simple level, the way that dual core works on the LPC43xx is that the Cortex-M4 part is the master CPU, and the Cortex-M0 the slave MCU. When the system powers up, the M4 will start executing, but the M0 will be held in reset until the code running on the M4 has set up the full system and then explicitly releases the M0 from reset.
We have some dual core related example work underway at the moment. This isn't finished yet - thus I can't really post anything here right now. But if you are using Red Suite NXP Edition with valid support entitlement rather than LPCXpresso, then we might be able to provide you with some information. Just contact our support team directly...
