Content originally posted in LPCWare by tuxx on Mon Jan 14 15:29:39 MST 2013 In section 19.2 of the user manual, it says that the RTI clock must be enabled by setting bit 25 of the SYSAHBCLKCTRL register. However in table 19 of the same manual bit 25 is marked as "reserved".
I am confused... is bit 25 the RTI clock enable or is it reserved? There seems to be an error in the manual.
Content originally posted in LPCWare by mcembedded on Thu Jan 17 20:17:55 MST 2013 Hi tuxx, Yes, bit 25 in SYSAHBCLKCTRL is reserved. RTI is always running so do not need to enable it. We are releasing corrected user's Manual soon.
Content originally posted in LPCWare by Ex-Zero on Tue Jan 15 03:04:04 MST 2013 I always hope someone responsible from NXP is reading our threads here :eek:
Content originally posted in LPCWare by tuxx on Tue Jan 15 02:30:36 MST 2013 Quote: Zero Since Chapter 19: LPC1315/16/17/45/46/47 Repetitive Interrupt Timer(RI timer) is a new feature it's SYSAHBCLKCTRL bit has probably been forgotten in Table 19 of User Manual. So I would guess it's disabled by default and you have to enable it as usual in your Init code :)
Content originally posted in LPCWare by Ex-Zero on Tue Jan 15 01:46:31 MST 2013 Since Chapter 19: LPC1315/16/17/45/46/47 Repetitive Interrupt Timer(RI timer) is a new feature it's SYSAHBCLKCTRL bit has probably been forgotten in Table 19 of User Manual. So I would guess it's disabled by default and you have to enable it as usual in your Init code :)
Content originally posted in LPCWare by Ex-Zero on Mon Jan 14 16:34:01 MST 2013 Quote: tuxx I am confused... is bit 25 the RTI clock enable or is it reserved?
Disabled ;)
Could be useful if you disclose us which UM you are talking about (something like UM10524 Rev. 2 — 19 November 2012) :)
