interrupt handler for pin0.x and 2.x???

[lpcware]

Content originally posted in LPCWare by irven on Wed Oct 31 03:05:00 MST 2012
[FONT=Arial]Hi all,[/FONT]
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[FONT=Arial]i working with a LPCXpresso Board 1769 and in the usermanual in found that al Ports 0.x and 2.x can creat interrupts and for exampel in the [SIZE=3][COLOR=#005042][SIZE=3][COLOR=#005042][SIZE=3][COLOR=#005042][COLOR=black]IO0IntEnR[/COLOR][COLOR=black]Register i can choose the ports for rising edge interrupt. But my problem is there are no Interrupt Handler for this Ports.[/COLOR][/COLOR][/SIZE][/COLOR][/SIZE][/COLOR][/SIZE][/FONT]
[FONT=Arial][SIZE=3][COLOR=#005042][SIZE=3][COLOR=#005042][SIZE=3][COLOR=#005042][COLOR=#000000]Do somebody know how to use this interrupts and do i have to write my own Interrupt handler ( i dont know how!)?[/COLOR][/COLOR][/SIZE][/COLOR][/SIZE][/COLOR][/SIZE][/FONT]
[FONT=Arial]There are only Interrupt handler for the EINT0-EINT3 but that are only 4 and not all 0.x and 2.x Ports[/FONT]
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[FONT=Arial]best regards [/FONT]
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[lpcware]

Content originally posted in LPCWare by Ex-Zero on Wed Oct 31 09:12:30 MST 2012

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Quote: irven
if i understand this right ther is only one Interrupt handler for all the GPIO Interrupts?

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Yes, all (enabled) GPIO interrupts trigger EINT3 :)

[lpcware]

Content originally posted in LPCWare by irven on Wed Oct 31 05:43:43 MST 2012
ah ok i missed the important note.
thanks a lot!
if i understand this right ther is only one Interrupt handler for all the GPIO Interrupts?

best regards.

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Wed Oct 31 03:22:58 MST 2012

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Quote: irven
[FONT=Arial][SIZE=3][COLOR=#005042][SIZE=3][COLOR=#005042][SIZE=3][COLOR=#005042][COLOR=black]But my problem is there are no Interrupt Handler for this Ports.[/COLOR][/COLOR][/SIZE][/COLOR][/SIZE][/COLOR][/SIZE][/FONT]

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:confused:

UM10360:

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Quote:

Table 50. Connection of interrupt sources to the Vectored Interrupt Controller
...
21 External Interrupt External Interrupt 3 (EINT3).
[COLOR=Red][B]Note: EINT3 channel is shared with GPIO interrupts[/B][/COLOR]

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