feature request - M0 reflector option

lpcware · ‎06-15-2016

Content originally posted in LPCWare by jdurand on Sun Nov 04 11:02:05 MST 2012
Since M0 parts don't allow erasing of sector 0 from IAP, only from external to the part, it would be REALLY handy if LPCXpresso had an option to automatically add the vector reflector.

I've lost a lot of work researching this unexpected requirement and really hate having to adjust the automatically generated linker scripts just so I can get back to the job at hand.

What I mean is:
In segment 0 the vector table points to a stack of short routines also in segment 0 to essentially remap the vectors to the real one (the hard, but only way it seems this can be done).

Of course included in this moving ".isp_vectors" up to the start of usable FLASH at 0x1000 in the linker scripts without the user having to edit them.

Below, RealVectors is a pointer to 0x1000.

The user should still be able to set the CRP_WORD to whatever they want, I'll be using level 2 in case I have to recover from a bad firmware update (only needed the function a couple of times across all our products for the last 13 years).

There does not need to be ANY support for loading in new firmware, actually, if you want to offer it, make it an option to kill it. Our users may only update firmware using our encrypted function that pulls the update from an external FLASH chip.

Example of the first few routines in sector zero:

// The reset handler
ldr r0, RealVectors;   // starting address of real vector table
ldr r1, [r0];    // get real pointer
mov sp, r1;    // update stack pointer
ldr r1, [r0, #4*1] ;    // get reset vector
bx  r1;    // start real program

// The NMI handler
ldr r0, RealVectors;    // starting address of real vector table
ldr r1, [r0, #4*2] ;    // get real vector
bx  r1;    // jump to real program

// The hard fault handler
ldr r0, RealVectors;    // starting address of real vector table
ldr r1, [r0, #4*3];    // get real vector
bx  r1;    // jump to real program

// FreeRTOS SVCall handler
ldr r0, RealVectors;    // starting address of real vector table
ldr r1, [r0, #4*11];    // get real vector
bx  r1;    // jump to real program

the above repeats for all the vectors through 47.

Another clarification is sector zero should be INCLUDED in the axf file so the debugger can install it. We *NEVER* use the ISP option on any brand of any chips unless forced to. On production boards the SWD connector is pressed against contact pads on the board (we don't ship SWD connectors since they will never be used again), the part it fully programmed, then the board is off to test. Any further firmware updates are done through our internal functions.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by jdurand on Tue Nov 06 15:38:29 MST 2012
I just tried it again (erase all sectors (0-17)) and it worked this time! I must have had something off the first time and when I looked it up I believed the documentation (I have got to stop believing documentation, but the NXP docs seem to be reasonably accurate).

That means the NXP Secondary Bootloader app note is wrong in saying Sector 0 can't be erased with IAP.

Also the UM10441 document is wrong in saying the IAP commands can't erase Sector 0.

Thanks for getting me to try one more time, and now I have a reflector in case I ever need it.

I've been working on another project all day so hadn't looked at it since last night.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by ToBeFrank on Tue Nov 06 14:56:18 MST 2012

Quote: jdurand
How do you do that? I've asked around and keep getting pointed back to the manual that says:
"The boot sector can not be prepared by this command. "
UM10441, Table 309

and
"The boot sector can not be erased by this command. "
table 311.

As I said, I use IAP and treat it just like any other sector. I believe the "boot sector" here may be referring to the sector containing the 16kB boot ROM.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by jdurand on Tue Nov 06 09:58:41 MST 2012
Not sure what just happened, I was about to click SUBMIT and suddenly the screen went to "thank you for logging in" and then gave me a blank reply window.

Anyway, yes I'm running from RAM.

ISP and SWD can erase all of FLASH. In CRP-2 SWD doesn't work but ISP can still erase all of FLASH. This is per the documentation, I only use SWD and have never touched the ISP on an ARM part.

According to the documentation and from my testing, IAP will NOT allow preparing or erasing sector zero in a Cortex M0 part. I believe that's the only Cortex part with that restriction.

Is anyone from NXP listening? Could you toss in a clarification?

lpcware · ‎06-15-2016

Content originally posted in LPCWare by TheFallGuy on Tue Nov 06 09:50:48 MST 2012
Without seeing your code, it is difficult to know what you are doing wrong, but the only way to program the flash is through IAP - that is how FlashMagic, Code Red, Keil etc program the flash (including the first sector). I think Keil publish the source code to their flash driver, so it might be worth looking at that.

BTW: You are running from RAM aren't you?

lpcware · ‎06-15-2016

Content originally posted in LPCWare by jdurand on Mon Nov 05 23:48:33 MST 2012

Quote: ToBeFrank
That's not correct. I have my own bootloader that lives in sector 0, and it can reprogram itself using IAP. Did you mean the M0 parts don't have VTOR? Note that they do have SYSMEMREMAP to remap the vector table into RAM, though.

How do you do that? I've asked around and keep getting pointed back to the manual that says:
"The boot sector can not be prepared by this command. "
UM10441, Table 309

and
"The boot sector can not be erased by this command. "
table 311.

Also the app-note on secondary bootloaders the other person mentioned.

BTW: I found my other problem, wasn't the debugger, just one register short on a push. I can now erase and reprogram sectors 1 and up, but can't touch sector 0.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by jdurand on Mon Nov 05 23:35:08 MST 2012
Yes, I read that but I asked for a "tick this box and the IDE takes care of it for you" option.

And...I do NOT want it ever trying to load an update in from the serial port. ALL I want is a reflector (which I've written and have working fine) without having to manually edit linker scripts.

And yes, I read about the cr_macro file, but since I STILL had to edit the linker script I just skipped it and did it all manually. Even have the CRP word in the right place.

For now I'll have to manually insert this in every job that uses an M0 (a really good reason for me to disqualify M0 parts in new designs).

I'm off to a new problem, some IAP functions are causing a hard fault, but all the calling parameters are right.
Edit: Found the hard-fault problem, one short on a PUSH.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by daniel.widyanto on Sun Nov 04 21:03:16 MST 2012
There's app note in NXP website to address this. Please refer to http://www.nxp.com/documents/application_note/AN10995.zip

lpcware · ‎06-15-2016

Content originally posted in LPCWare by ToBeFrank on Sun Nov 04 11:59:22 MST 2012

Quote: jdurand
Since M0 parts don't allow erasing of sector 0 from IAP, only from external to the part

That's not correct. I have my own bootloader that lives in sector 0, and it can reprogram itself using IAP. Did you mean the M0 parts don't have VTOR? Note that they do have SYSMEMREMAP to remap the vector table into RAM, though.