Content originally posted in LPCWare by frame on Mon Jul 09 05:01:31 MST 2012
ArnesB's second hint is much more important:
Is the clock for the GPIO peripheral enabled ?
That is the most common trap in Cortex Mx development, there is almost nobody that did not yet step in. And, it is usually NOT noted in the respective reference manual section of the peripheral unit, but only in the system control/clock generation section.
All peripheral clocks are off after reset, and writing to unclocked peripheral registers has the described effect, i.e. none.