Content originally posted in LPCWare by ehughes on Sun Feb 13 10:18:47 MST 2011
Hello all.
I got a version of the msc_rom example working under windows 64-bit. I have attached a zip file with project. Details:
1.) Instead of internal RAM, the file system area is in an external 16Megabit (2MB) device (M25PE16).
2.) The external flash is connected via SPI. I used a P0.2 as the chip select signal
3.) The file FLASH.c has the M25PE access routines. I implemented enough to get it working. I am pretty sure I could run the SPI with a faster clock but have not optimized this.
4.) The MSC_MemoryWrite makes a few assumptions to get writing to work. MSC accesses from a host controller assumes 512 byte sectors but the endpoints are only 64-bytes. When a sector is writting, I assume the first 64-bytes are sector aligned. My flash device has 256-byte pages. If the sector to be written has its lowest 8-bits as zero, I first erase the page before a write. This works under the assumption that the host will write things out in a sane way (i.e. the first 64 bytes of the 512 sector arewritten first, etc)
5.) The first time it was plugged in, I had to do a "quick format". After that everything appeared to read/write as normal.
Not sure why Win7 doesn't like the 6k RAM drive in the NXP sample. The "bootloader" certainly works fine. It may be the very small size of the drive.
From here I am going to get the Chan FATFs ported so the MCU can access the drive. After than I will port to the CDC/MSC composite example.
Message to NXP: Please make this chip with more Flash and CAN! A 64k or 128k would be *perfect* for 99% of my products. A 12-bit data converter would be great. I don't need the host controller or ethernet like the 1768. The build in MSC makes this product very nice! A version with the CDC and MSC composite drivers in ROM would be nice as well.
