UART_IRQHandler

[lpcware]

Content originally posted in LPCWare by Mike45 on Fri Oct 29 07:23:05 MST 2010
I am wondering why there is a conditional clause to check for LSR_RDR, while the brace was entered because of an error?  Notice the bolded condition below:

  uint8_t IIRValue, LSRValue;
  uint8_t Dummy = Dummy;

  IIRValue = LPC_UART->IIR;
    
  IIRValue >>= 1;/* skip pending bit in IIR */
  IIRValue &= 0x07;/* check bit 1~3, interrupt identification */
  if (IIRValue == IIR_RLS)/* Receive Line Status */
  {
    LSRValue = LPC_UART->LSR;
    /* Receive Line Status */
    if (LSRValue & (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))
    {
      /* There are errors or break interrupt */
      /* Read LSR will clear the interrupt */
      UARTStatus = LSRValue;
      Dummy = LPC_UART->RBR;/* Dummy read on RX to clear 
interrupt, then bail out */
      return;
    }
   [B] if (LSRValue & LSR_RDR)/* Receive Data Ready */
    {
      /* If no error on RLS, normal ready, save into the data buffer. */
      /* Note: read RBR will clear the interrupt */
      UARTBuffer[UARTCount++] = LPC_UART->RBR;
      if (UARTCount == BUFSIZE)
      {
        UARTCount = 0;/* buffer overflow */
      }
    }[/B]
  }
  else if (IIRValue == IIR_RDA)/* Receive Data Available */
  {
    /* Receive Data Available */
    UARTBuffer[UARTCount++] = LPC_UART->RBR;
    if (UARTCount == BUFSIZE)
    {
      UARTCount = 0;/* buffer overflow */
    }
  }

IIR_RDA != LSR_RDR ?  , meaning RDA is set when the trigger level is reached.  Besides that is there something else one should know for "proper" usage / differentiation?