Timer match question

[lpcware]

Content originally posted in LPCWare by Dave3891 on Tue Jul 26 20:43:24 MST 2011
I am trying to use one 32 bit timer and 3 match registers in toggle mode to make a variable triple frequency generator.
I can't seem to find what the bug in my code is.
Everything works fine for the first bit in debug, but then it just seems to stop interrupting and incrementing the match registers.

My code uses the timer0 as a free running timer, and then I just add a new value to the match register on its interrupt and count the pulses.
Any help would be appreciated.


[LEFT]Thanks


Dave[/LEFT]

[lpcware]

Content originally posted in LPCWare by Dave3891 on Wed Jul 27 09:09:21 MST 2011
Thanks!

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Wed Jul 27 06:44:12 MST 2011

---

Quote: Dave3891
So there should be no problem with overflowing the match registers...

---

No problem :)

[lpcware]

Content originally posted in LPCWare by Dave3891 on Wed Jul 27 06:12:53 MST 2011

---

Quote: Zero
That's your problem :mad:

Are you aware that timers are still running (and missing the next match) if you suspend your program in debug mode?

And next match event will need about (2^32)*0.5us = 2147sec = 35.79min :eek:

---

I was not aware of that.
So there should be no problem with overflowing the match registers to make them wrap back around like the timer (when I am NOT in debug.) ?

Thanks
Dave

[lpcware]

Content originally posted in LPCWare by Ex-Zero on Wed Jul 27 01:32:11 MST 2011

---

Quote: Dave3891
...Everything works fine for the first bit in debug, but then it just seems to stop interrupting and incrementing the match registers...

...add a new value to the match register...

---

That's your problem :mad:

Are you aware that timers are still running (and missing the next match) if you suspend your program in debug mode?

And next match event will need about (2^32)*0.5us = 2147sec = 35.79min :eek:

[lpcware]

Content originally posted in LPCWare by Dave3891 on Tue Jul 26 20:43:58 MST 2011
Here is the code

[B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] matchNum1 10;[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] matchNum2 30;[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]#define[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] matchNum3 100;
[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]void[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] [B]TIMER32_0_IRQHandler[/B]([/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]void[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2])
{
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]if[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2](LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]IR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] & 1)
{
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]IR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = 1;
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR0[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR0[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] + matchNum1;
Count1++;
}
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]if[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2](LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]IR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] & (0x1<<1))
{
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]IR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = (1<<1);
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR1[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR1[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] + matchNum2;
Count2++;
}
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]if[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2](LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]IR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] & (0x1<<2))
{
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]IR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = (1<<2);
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR2[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR2[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] + matchNum3;
Count3++;
}

[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]return[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2];
}
[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]void[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] [B]initTimer[/B](){

LPC_SYSCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]SYSAHBCLKCTRL[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= (1<<9); [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// Enables clock for 32-bit counter/timer 0.[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO1_5[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] &= ~0x07; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* Clear Bits. 0x07 = 111 ~ = 000 & sets all */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO1_5[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= 0x02; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* Timer0_32 CAP0 0x02 = 010 | sets it*/[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO1_6[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] &= ~0x07; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// Clear[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO1_6[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= 0x02; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* Timer0_32 MAT0 */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO1_7[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] &= ~0x07; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// Clear[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO1_7[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= 0x02; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* Timer0_32 MAT1 */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO0_1[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] &= ~0x07; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// Clear[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_IOCON->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PIO0_1[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= 0x02; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* Timer0_32 MAT2 */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]EMR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] &= ~(0xFF<<4); [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// Clear[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]EMR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= (0x03<<4); [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* MR0 Toggle */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]EMR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= (0x03<<6); [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* MR1 Toggle */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]EMR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] |= (0x03<<8); [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* MR2 Toggle */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MCR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = 0x49; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* Interrupt on MR0, MR1, MR2 */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]PR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = 36;

[/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]/* Enable the TIMER0 Interrupt */[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]NVIC_EnableIRQ([/SIZE][I][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]TIMER_32_0_IRQn[/I][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2]);

[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]return[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2];
}

&#12288;[/LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055][LEFT]int[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] [B]main[/B]([/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]void[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2]) {
initTimer();

LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR0[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = matchNum1;
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR1[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = matchNum2;
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR2[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = matchNum3;
LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]TCR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = 1; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// Enable Timer 0[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]while[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2](1) {
matchReg1 = LPC_TMR32B0->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]MR0[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2]; [/SIZE][SIZE=2][COLOR=#3f7f5f][SIZE=2][COLOR=#3f7f5f]// Used for debugging[/LEFT]
[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2][LEFT]
}
[/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]return[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] 0 ;[/LEFT]
}
[/SIZE]