Content originally posted in LPCWare by nkarakotas on Sun Jan 01 02:06:14 MST 2012 Hi,
Im stumbling across a strange problem when enabling various parts of the ENET. For example once entering the setup of emac and execute:
/* Initialize MAC control registers. */
LPC_EMAC->MAC1 = EMAC_MAC1_PASS_ALL;
LPC_EMAC->MAC2 = EMAC_MAC2_CRC_EN | EMAC_MAC2_PAD_EN;
LPC_EMAC->MAXF = EMAC_ETH_MAX_FLEN;
I get stalled on bus operation! The strange thing is that I use solid code that always worked before. Also sometimes it recovers and works perfectly. For instance last night it was running OK. I turn on the PC to start a code marathon session and I run in to this problem...there goes my excitement
Could there be something wrong with the chip? Im out of ideas..
Content originally posted in LPCWare by tomkrysl on Thu Mar 15 05:23:19 MST 2012 Thanks for answers. My problem was solved by using other emac library.
The library supplied with LPCXpresso Lib_MCU (lpc17xx_emac.c) didn't work. The library RDB1768cmsis2 (different lpc17xx_emac.c) works well.
However, I think system should not crash if sth. is wrong about the PHY chip. If there was a software method to check if PHY is working well I would appreciate this solution.
Content originally posted in LPCWare by nkarakotas on Tue Feb 21 07:16:35 MST 2012 Hi,
My problem was because of not soldering well the LAN8720 on my custom board. Once all the soldering was checked the board works not stop without any problems. Try and check for dried joints, connection problems.
Board is LPCXpresso LPC1768 Rev A (c)2010 with LAN8720A.
I need a stable architecture for my product. Not a system that hangs up when (possibly) there is some communication problem with some external device.
Why, for god's sake, they did not make the PHY a part of the chip like TI does?
After many problems I already had to solve with LPC I'am almost definitely decided to use TI ARMs, which are unfortunately less available in my country (afaik).
Content originally posted in LPCWare by nkarakotas on Sun Jan 01 02:37:26 MST 2012 Hi,
After reading the User Manual I spotted the following:
[B]Remark: it is important to configure the PHY and insure that reference clocks (ENET_REF_CLK signal in RMII mode, or both ENET_RX_CLK and ENET_TX_CLK signals in MII mode) are present at the external pins and connected to the EMAC module (selecting the appropriate pins using the PINSEL registers) prior to continuing with Ethernet configuration. Otherwise the CPU can become locked and no further functionality will be possible. This will cause JTAG lose communication with the target, if debug mode is being used.[/B]
It might actually be the LAN8720A not responding. I will do some checks.To tell you the truth from the begging this new design was doing strange things in that section but disappeared for a while..