Content originally posted in LPCWare by ECamino on Thu Aug 15 07:52:07 MST 2013
Hi,
If there is data ready for tx on MISO, then the clock signal makes the slave send it out to the master making the com full duplex.
In your main loop, why not create a function that will read the appropriate registers (not sure, but my guess would be TX/RTRIS or TX/RTMIS?) to see if there is data tx/rx ready? If so, you can set a flag or change a state, return and continue. This way you poll the SPI (no interrupts) and be non-blocking.
Have you searched for example code from LPCware or LPCXpresso?
EC