Content originally posted in LPCWare by Meyer on Fri Sep 13 01:34:44 MST 2013
Hi LpcTeam,
I have problems running my code from internal Ram. I have made changes in the linker script:
INCLUDE "lib.ld"
INCLUDE "4350_mem_Ram.ld"
ENTRY(ResetISR)
SECTIONS
{
/* MAIN TEXT SECTION */
.text : ALIGN(4)
{
FILL(0xff)
KEEP(*(.isr_vector))
/* Global Section Table */
. = ALIGN(4) ;
__section_table_start = .;
__data_section_table = .;
LONG(LOADADDR(.data));
LONG( ADDR(.data)) ;
LONG( SIZEOF(.data));
LONG(LOADADDR(.data_RAM2));
LONG( ADDR(.data_RAM2)) ;
LONG( SIZEOF(.data_RAM2));
LONG(LOADADDR(.data_RAM3));
LONG( ADDR(.data_RAM3)) ;
LONG( SIZEOF(.data_RAM3));
LONG(LOADADDR(.data_RAM4));
LONG( ADDR(.data_RAM4)) ;
LONG( SIZEOF(.data_RAM4));
LONG(LOADADDR(.data_RAM5));
LONG( ADDR(.data_RAM5)) ;
LONG( SIZEOF(.data_RAM5));
__data_section_table_end = .;
__bss_section_table = .;
LONG( ADDR(.bss));
LONG( SIZEOF(.bss));
LONG( ADDR(.bss_RAM2));
LONG( SIZEOF(.bss_RAM2));
LONG( ADDR(.bss_RAM3));
LONG( SIZEOF(.bss_RAM3));
LONG( ADDR(.bss_RAM4));
LONG( SIZEOF(.bss_RAM4));
LONG( ADDR(.bss_RAM5));
LONG( SIZEOF(.bss_RAM5));
__bss_section_table_end = .;
__section_table_end = . ;
/* End of Global Section Table */
*(.after_vectors*)
*(.text*)
*(.rodata .rodata.*)
. = ALIGN(4);
} > RamLoc128
/*
* for exception handling/unwind - some Newlib functions (in common
* with C++ and STDC++) use this.
* Use KEEP so not discarded with --gc-sections
*/
.ARM.extab : ALIGN(4)
{
KEEP(*(.ARM.extab* .gnu.linkonce.armextab.*))
} > RamLoc128
__exidx_start = .;
.ARM.exidx : ALIGN(4)
{
KEEP(*(.ARM.exidx* .gnu.linkonce.armexidx.*))
} > RamLoc128
__exidx_end = .;
_etext = .;
.data_RAM2 : ALIGN(4)
{
FILL(0xff)
*(.data.$RAM2*)
*(.data.$RamLoc72*)
. = ALIGN(4) ;
} > RamLoc72 AT>RamLoc128
.data_RAM3 : ALIGN(4)
{
FILL(0xff)
*(.data.$RAM3*)
*(.data.$RamAHB32*)
. = ALIGN(4) ;
} > RamAHB32 AT>RamLoc128
.data_RAM4 : ALIGN(4)
{
FILL(0xff)
*(.data.$RAM4*)
*(.data.$RamAHB16*)
. = ALIGN(4) ;
} > RamAHB16 AT>RamLoc128
.data_RAM5 : ALIGN(4)
{
FILL(0xff)
*(.data.$RAM5*)
*(.data.$RamAHB_ETB16*)
. = ALIGN(4) ;
} > RamAHB_ETB16 AT>RamLoc128
/* MAIN DATA SECTION */
.uninit_RESERVED : ALIGN(4)
{
KEEP(*(.bss.$RESERVED*))
. = ALIGN(4) ;
_end_uninit_RESERVED = .;
} > RamLoc72
.data : ALIGN(4)
{
FILL(0xff)
_data = .;
*(vtable)
*(.data*)
. = ALIGN(4) ;
_edata = .;
} > RamLoc72 AT>RamLoc128
.bss_RAM2 : ALIGN(4)
{
*(.bss.$RAM2*)
*(.bss.$RamLoc72*)
. = ALIGN(4) ;
} > RamLoc72
.bss_RAM3 : ALIGN(4)
{
*(.bss.$RAM3*)
*(.bss.$RamAHB32*)
. = ALIGN(4) ;
} > RamAHB32
.bss_RAM4 : ALIGN(4)
{
*(.bss.$RAM4*)
*(.bss.$RamAHB16*)
. = ALIGN(4) ;
} > RamAHB16
.bss_RAM5 : ALIGN(4)
{
*(.bss.$RAM5*)
*(.bss.$RamAHB_ETB16*)
. = ALIGN(4) ;
} > RamAHB_ETB16
/* MAIN BSS SECTION */
.bss : ALIGN(4)
{
_bss = .;
*(.bss*)
*(COMMON)
. = ALIGN(4) ;
_ebss = .;
PROVIDE(end = .);
} > RamLoc72
PROVIDE(_pvHeapStart = .);
/* Es kann nicht im externen Sdram platziert werden, weil der Sdram vor der Nutzung initialiersiert werden soll */
PROVIDE(_vStackTop = __top_RamLoc72 - 0);
}
On the debug command I load the code into ram. The code runs but no interrupts. The Isr Vector table must be overwritten by bootloader?
Please help me
Thx