Reliable UART Escape Sequence Detection

[lpcware]

Content originally posted in LPCWare by ajg112 on Thu Aug 04 04:38:53 MST 2011
Hi All,

I'm looking for an approach for reliably detecting an escape sequence received by a LPC1768 UART. Basically, I need to determine if a key press code sent to the micro is a basic key press (1 byte), or an extended key (3 to 4 bytes).

Escape sequences start with 0x1B and then have 2 or three bytes immediately following. The critical part is looking for a gap between one byte's stop bit and the next byte's start bit. When typing VERY quickly (or hitting two keys together by mistake) it is possible for the gap to be very small (less than one character width). Escape sequences have no gap.

If I could ensure that no interrupts would be serviced whilst receiving data the problem would be trivial. One approach (that is prone to delays caused by ISRs) is on detection of a byte, wait for just over 1 character length in time and then check if another byte is waiting in the RX FIFO. If there is, then I assume these are part of a sequence. However, if an ISR causes a delay the timing is invalidated.

I also looked at setting the RX FIFO trigger level to 4 characters and using the Character Timeout Indicator, but the timeout is too long. This approach can not determine a sequence from very closely spaced characters.

Any ideas?
Thanks
Andy

[lpcware]

Content originally posted in LPCWare by ajg112 on Tue Aug 09 01:17:10 MST 2011
The baud rate is 115200. As for accuracy, I would like to be always able to distinguish a escaped sequence of 3 or 4 bytes (single key press) from very closely spaced (see attachments) single key press.

escapedSequence.jpg is a quick diagram summary.
keypresses.jpg shows two very close keypresses (probably worst case)

ToBeFrank, I'm interested in your match bit idea. Are you saying it is possible to set a hardware bit without software intervention when a character is received?

Thanks all
Andy

[lpcware]

Content originally posted in LPCWare by NXP_Europe on Mon Aug 08 17:09:12 MST 2011
Hello Andy,

what is the baudrate and what accuracy is expected of the timestamp?

[lpcware]

Content originally posted in LPCWare by ToBeFrank on Mon Aug 08 09:41:02 MST 2011
You don't have to get an interrupt when the match occurs. Just have the bit get set.

[lpcware]

Content originally posted in LPCWare by ajg112 on Mon Aug 08 09:38:59 MST 2011
The difficulty is to ensure that the timestamp is made exactly when the character arrives. That is difficult to achieve if there is a possibility that an interrupt is being serviced when a character is received. Unless you enable interrupts within ISR, you may need to wait for an ISR to finish before you can timestamp the received character. At which point the timestamp is probably invalid.

Andy

[lpcware]

Content originally posted in LPCWare by ToBeFrank on Thu Aug 04 10:20:13 MST 2011
If your bit rate isn't too high, time it? When you get a character, set a match timer that sets a bit. When you get the next char, if the bit is set you know you exceeded your time and it is not an escape. You can adjust the match to reliably detect escapes.