LPC2214 PLL issue using LPCXpresso

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LPC2214 PLL issue using LPCXpresso

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andrewbromilow
Contributor I

I am trying to evaluate LPCXpresso using the evaluation version, we have been using Keil uVision3 for many years without issue with the LPC2214 microcontroller (ARM7tdmi core) and want to move to the LPC2478 which is not supported by our old version of uVision3.

This has forced the issue of upgrading our software and hence raised the possibility of moving from uVision3 to LPCXpresso, and therefore the evaluation.

I have produced a piece of evaluation code which I have compiled in both uVision3 and LPCXpresso succesfully.

The LPC2214 has a 10MHz crystal oscillator which we then configure the PLL to multiply to 60MHz.

The evaluation code basically configures timer T0 and then uses timer 0 to time 1mS intervals, after each 1mS interval a digital output is toggled which we can observe on an oscilloscope.

When compiled with uVision3 we get precisely what is expected an ON OFF signal of 1mS duration.

However with LPCXpresso the code will not function when the PLL is enabled. When the PLL is NOT enabled the code runs but we get a 6mS duration pulse i.e. we are running with a processor clock of 10MHz.

In cr_startup_lpc22.s code I only need to comment out the following for the code to function:-

   // Now swap the cpu clock to the PLL

   MOV R3,#(SET_PLLCON_ENABLE | SET_PLLCON_CONNECT)

   STR R3,[R0,#PLLCON_OFFSET]

   STR R1,[R0,#PLLFEED_OFFSET]

   STR R2,[R0,#PLLFEED_OFFSET]

In fact just commenting out the last 2 lines of the above is sufficient for the code to work but at the raw input clock frequency of 10MHz.

Any Ideas?

Many thanks,

Andy.

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andrewbromilow
Contributor I

I have now resolved this issue.

there is an error in the startup code for the LPC22xx processors that LPCXpresso is using, file name "cr_startup_lpc22.s"

The file contains the following lines of code:-

.set SET_PLLCFG_DIV1, (0x0<<4)

.set SET_PLLCFG_DIV2, (0x1<<4)

.set SET_PLLCFG_DIV4, (0x2<<4)

.set SET_PLLCFG_DIV8, (0x3<<4)

This is incorrect and can result in a divisor for the PLL which puts it out of range.

The code should read:

.set SET_PLLCFG_DIV1, (0x0<<5)

.set SET_PLLCFG_DIV2, (0x1<<5)

.set SET_PLLCFG_DIV4, (0x2<<5)

.set SET_PLLCFG_DIV8, (0x3<<5)

Hope this helps anyone else who may stumble across the same problem.

Best regards,

Andy.

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