LPC1857 - emc External SRAM write problem

[lpcware]

Content originally posted in LPCWare by lpc1857 on Sat Jan 19 02:27:09 MST 2013
hi,
   I am using the MCB1800 board from KEIl containing LPC1857. I am having problem with the emc of LPC1857 when I tried it with external SRAM. The problem that I am facing is that the controller writes to the four location though I have selected 8-bit mode and only written once to SRAM in my C code.
I am using chip select 3 with SRAM. So why it is writing to four address instead one ? any help would be much appreciated.

[lpcware]

Content originally posted in LPCWare by lpc1857 on Tue Jan 22 01:45:25 MST 2013
Thanks MikeSimmonds for your help. The problem is caused by the latency issues so now it has been solved. Thanks again MikeSimmonds.

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Mon Jan 21 03:57:29 MST 2013
[FONT=Tahoma][SIZE=2]I suspect that you need to set the PB bit when you configure the static ram.

see this register description in the user manual

STATICCONFIG0 R/W 0x200 Configuration for EMC_CS0.

Also see the DATASHEET (a separate document) for your chip.

There are two ext memory read write diagrams -- for the PB=1 AND the PB=0
cases.

Note that for one of then, OE is never enable!!!

Regards, Mike


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[lpcware]

Content originally posted in LPCWare by lpc1857 on Sun Jan 20 21:19:57 MST 2013
The previously stated problem was solved using the char pointer but then it caused another error. The problem now is that at the time of read the emc is not generating the read enable signal. it is passing the address as we checked in the logic analyzer but it is not generating the read enable signal. Any help would be much appreciated.

[lpcware]

Content originally posted in LPCWare by MikeSimmonds on Sat Jan 19 05:57:35 MST 2013
[FONT=Tahoma][SIZE=2]I do not have time to investigate either the board or the chip manual, but two thoughts occur.
Is the "C" pointer a char * (rather than a long * etc.).
Does the hardware (and EMC setup) implement BLS0 to BLS3 (byte lanes) correctly?

HTH -- Mike
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