LPC1769 + Uart + i2c

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LPC1769 + Uart + i2c

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by hcanova on Thu Nov 10 06:20:56 MST 2011
Hi

I'm new here and I started to work with the lpc 1769, to learn how UART works I start with on example code (attached), but after many attempts to put it to work, i has some problems, when i get into debug mode it stopped instantaneous and after this when i tried to enter in debug mode again is shown on error (15), about the flash is not accessible, and i need do reset the lpc.


("The first thing to try with NXP LPC MCU's to recover debug access is to boot into the ISP bootloader. That is, GND the ISP pin, assert RST, then remove the GND to ISP pin. Once in the ISP bootloader, the target clock configuration is stable, and the debug pins are in their default state - you should be able to connect" - Code red support)



----

Another question when i tried to use the 12c example , an error occurs, when the code below appear

 StatValue = LPC_I2C0->STAT;


saying that STAT is not part of LPC_I2C0, this occurs with all LPC_I2Cx lines.

Anyone know what's going on?

Thanks a lot

Henrique
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lpcware
NXP Employee
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Content originally posted in LPCWare by hcanova on Thu Nov 10 10:57:01 MST 2011

Quote: Zero
Do you know what structures are?

In CMSISv2_LPC17xx  LPC17xx.h I2C structure is defined as:
/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
/** @brief  Inter-Integrated Circuit (I2C) register structure definition */
typedef struct
{
  __IO uint32_t CONSET;                     /*!< Offset: 0x000 (R/W)  I2C Control Set Register */
  __I  uint32_t[COLOR=Red] STAT[/COLOR];                       /*!< Offset: 0x004 (R/ )  I2C Status Register */
  __IO uint32_t DAT;                        /*!< Offset: 0x008 (R/W)  I2C Data Register */
  __IO uint32_t ADR0;                       /*!< Offset: 0x00C (R/W)  I2C Slave Address Register 0 */
  __IO uint32_t SCLH;                       /*!< Offset: 0x010 (R/W)  SCH Duty Cycle Register High Half Word */
  __IO uint32_t SCLL;                       /*!< Offset: 0x014 (R/W)  SCL Duty Cycle Register Low Half Word */
  __O  uint32_t CONCLR;                     /*!< Offset: 0x018 (R/W)  I2C Control Clear Register */
  __IO uint32_t MMCTRL;                     /*!< Offset: 0x01C (R/W)  Monitor mode control register */
  __IO uint32_t ADR1;                       /*!< Offset: 0x020 (R/W)  I2C Slave Address Register 1 */
  __IO uint32_t ADR2;                       /*!< Offset: 0x024 (R/W)  I2C Slave Address Register 2 */
  __IO uint32_t ADR3;                       /*!< Offset: 0x028 (R/W)  I2C Slave Address Register 3 */
  __I  uint32_t DATA_BUFFER;                /*!< Offset: 0x02C (R/ )  Data buffer Register */
  __IO uint32_t MASK0;                      /*!< Offset: 0x030 (R/W)  I2C Slave address mask register 0 */
  __IO uint32_t MASK1;                      /*!< Offset: 0x034 (R/W)  I2C Slave address mask register 1 */
  __IO uint32_t MASK2;                      /*!< Offset: 0x038 (R/W)  I2C Slave address mask register 2 */
  __IO uint32_t MASK3;                      /*!< Offset: 0x03C (R/W)  I2C Slave address mask register 3 */
} LPC_I2C_TypeDef;
In CMSISv2p00_LPC17xx  LPC17xx.h I2C structure is defined as:
/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
typedef struct
{
  __IO uint32_t I2CONSET;
  __I  uint32_t[COLOR=Red] I2STAT[/COLOR];
  __IO uint32_t I2DAT;
  __IO uint32_t I2ADR0;
  __IO uint32_t I2SCLH;
  __IO uint32_t I2SCLL;
  __O  uint32_t I2CONCLR;
  __IO uint32_t MMCTRL;
  __IO uint32_t I2ADR1;
  __IO uint32_t I2ADR2;
  __IO uint32_t I2ADR3;
  __I  uint32_t I2DATA_BUFFER;
  __IO uint32_t I2MASK0;
  __IO uint32_t I2MASK1;
  __IO uint32_t I2MASK2;
  __IO uint32_t I2MASK3;
} LPC_I2C_TypeDef;
If your code is trying to access a structure member like LPC_I2C0->STAT, your compiler is confused if this structure member isn't available in the used CMSIS version :eek:
So you have to use either the correct CMSIS for your code or you have to change the structure member in your code to LPC_I2C0->I2STAT




i know what structures are, but i unknown about the difference between these version, now i'm able to make my projects (i gues.. ])

thanks
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Thu Nov 10 10:52:06 MST 2011
Do you know what structures are?

In CMSISv2_LPC17xx  LPC17xx.h I2C structure is defined as:
/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
/** @brief  Inter-Integrated Circuit (I2C) register structure definition */
typedef struct
{
  __IO uint32_t CONSET;                     /*!< Offset: 0x000 (R/W)  I2C Control Set Register */
  __I  uint32_t[COLOR=Red] STAT[/COLOR];                       /*!< Offset: 0x004 (R/ )  I2C Status Register */
  __IO uint32_t DAT;                        /*!< Offset: 0x008 (R/W)  I2C Data Register */
  __IO uint32_t ADR0;                       /*!< Offset: 0x00C (R/W)  I2C Slave Address Register 0 */
  __IO uint32_t SCLH;                       /*!< Offset: 0x010 (R/W)  SCH Duty Cycle Register High Half Word */
  __IO uint32_t SCLL;                       /*!< Offset: 0x014 (R/W)  SCL Duty Cycle Register Low Half Word */
  __O  uint32_t CONCLR;                     /*!< Offset: 0x018 (R/W)  I2C Control Clear Register */
  __IO uint32_t MMCTRL;                     /*!< Offset: 0x01C (R/W)  Monitor mode control register */
  __IO uint32_t ADR1;                       /*!< Offset: 0x020 (R/W)  I2C Slave Address Register 1 */
  __IO uint32_t ADR2;                       /*!< Offset: 0x024 (R/W)  I2C Slave Address Register 2 */
  __IO uint32_t ADR3;                       /*!< Offset: 0x028 (R/W)  I2C Slave Address Register 3 */
  __I  uint32_t DATA_BUFFER;                /*!< Offset: 0x02C (R/ )  Data buffer Register */
  __IO uint32_t MASK0;                      /*!< Offset: 0x030 (R/W)  I2C Slave address mask register 0 */
  __IO uint32_t MASK1;                      /*!< Offset: 0x034 (R/W)  I2C Slave address mask register 1 */
  __IO uint32_t MASK2;                      /*!< Offset: 0x038 (R/W)  I2C Slave address mask register 2 */
  __IO uint32_t MASK3;                      /*!< Offset: 0x03C (R/W)  I2C Slave address mask register 3 */
} LPC_I2C_TypeDef;
In CMSISv2p00_LPC17xx  LPC17xx.h I2C structure is defined as:
/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
typedef struct
{
  __IO uint32_t I2CONSET;
  __I  uint32_t[COLOR=Red] I2STAT[/COLOR];
  __IO uint32_t I2DAT;
  __IO uint32_t I2ADR0;
  __IO uint32_t I2SCLH;
  __IO uint32_t I2SCLL;
  __O  uint32_t I2CONCLR;
  __IO uint32_t MMCTRL;
  __IO uint32_t I2ADR1;
  __IO uint32_t I2ADR2;
  __IO uint32_t I2ADR3;
  __I  uint32_t I2DATA_BUFFER;
  __IO uint32_t I2MASK0;
  __IO uint32_t I2MASK1;
  __IO uint32_t I2MASK2;
  __IO uint32_t I2MASK3;
} LPC_I2C_TypeDef;
If your code is trying to access a structure member like LPC_I2C0->STAT, your compiler is confused if this structure member isn't available in the used CMSIS version :eek:
So you have to use either the correct CMSIS for your code or you have to change the structure member in your code to LPC_I2C0->I2STAT
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by hcanova on Thu Nov 10 10:05:37 MST 2011

Quote: Zero
Did you check your LPC17xx.h in CMSISv2_LPC17xx\inc :confused:

/******************************************************************************
 * @file:    LPC17xx.h
 * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for 
 *           NXP LPC17xx Device Series 
 * @version: V1.10
 * @date:    24. September 2010
 *----------------------------------------------------------------------------
 *
 * @note
 * Copyright (C) 2010 ARM Limited. All rights reserved.
 *
 * @par
 * ARM Limited (ARM) is supplying this software for use with Cortex-M3 
 * processor based microcontrollers.  This file can be freely distributed 
 * within development tools that are supporting such ARM based processors. 
 *
 * @par
 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
 *
 ******************************************************************************/
...

/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
/** @brief  Inter-Integrated Circuit (I2C) register structure definition */
typedef struct
{
  __IO uint32_t CONSET;                     /*!< Offset: 0x000 (R/W)  I2C Control Set Register */
  __I  uint32_t STAT;                       /*!< Offset: 0x004 (R/ )  I2C Status Register */
  __IO uint32_t DAT;                        /*!< Offset: 0x008 (R/W)  I2C Data Register */
  __IO uint32_t ADR0;                       /*!< Offset: 0x00C (R/W)  I2C Slave Address Register 0 */
  __IO uint32_t SCLH;                       /*!< Offset: 0x010 (R/W)  SCH Duty Cycle Register High Half Word */
  __IO uint32_t SCLL;                       /*!< Offset: 0x014 (R/W)  SCL Duty Cycle Register Low Half Word */
  __O  uint32_t CONCLR;                     /*!< Offset: 0x018 (R/W)  I2C Control Clear Register */
  __IO uint32_t MMCTRL;                     /*!< Offset: 0x01C (R/W)  Monitor mode control register */
  __IO uint32_t ADR1;                       /*!< Offset: 0x020 (R/W)  I2C Slave Address Register 1 */
  __IO uint32_t ADR2;                       /*!< Offset: 0x024 (R/W)  I2C Slave Address Register 2 */
  __IO uint32_t ADR3;                       /*!< Offset: 0x028 (R/W)  I2C Slave Address Register 3 */
  __I  uint32_t DATA_BUFFER;                /*!< Offset: 0x02C (R/ )  Data buffer Register */
  __IO uint32_t MASK0;                      /*!< Offset: 0x030 (R/W)  I2C Slave address mask register 0 */
  __IO uint32_t MASK1;                      /*!< Offset: 0x034 (R/W)  I2C Slave address mask register 1 */
  __IO uint32_t MASK2;                      /*!< Offset: 0x038 (R/W)  I2C Slave address mask register 2 */
  __IO uint32_t MASK3;                      /*!< Offset: 0x03C (R/W)  I2C Slave address mask register 3 */
} LPC_I2C_TypeDef;
If LPC_I2C_TypeDef is using different register names, you are not using the original CMSISv2_LPC17xx :eek:

Then it's time to delete it and import the original from NXP_LPCXpresso1769_MCB1700_2011-02-11.zip in your example folder




thanks zero

my lpc17xx.h was different, because i was using CMSISv2p00_LPC17xx now i imported this new one and the code build without problems

but why works with CMSISv2_LPC17xx and not work with CMSISv2[COLOR=Red]p00[/COLOR]_LPC17xx

again thanks for help
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Thu Nov 10 09:20:22 MST 2011
Did you check your LPC17xx.h in CMSISv2_LPC17xx\inc :confused:

/******************************************************************************
 * @file:    LPC17xx.h
 * @purpose: CMSIS Cortex-M3 Core Peripheral Access Layer Header File for 
 *           NXP LPC17xx Device Series 
 * @version: V1.10
 * @date:    24. September 2010
 *----------------------------------------------------------------------------
 *
 * @note
 * Copyright (C) 2010 ARM Limited. All rights reserved.
 *
 * @par
 * ARM Limited (ARM) is supplying this software for use with Cortex-M3 
 * processor based microcontrollers.  This file can be freely distributed 
 * within development tools that are supporting such ARM based processors. 
 *
 * @par
 * THIS SOFTWARE IS PROVIDED "AS IS".  NO WARRANTIES, WHETHER EXPRESS, IMPLIED
 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
 * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
 *
 ******************************************************************************/
...

/*------------- Inter-Integrated Circuit (I2C) -------------------------------*/
/** @brief  Inter-Integrated Circuit (I2C) register structure definition */
typedef struct
{
  __IO uint32_t CONSET;                     /*!< Offset: 0x000 (R/W)  I2C Control Set Register */
  __I  uint32_t STAT;                       /*!< Offset: 0x004 (R/ )  I2C Status Register */
  __IO uint32_t DAT;                        /*!< Offset: 0x008 (R/W)  I2C Data Register */
  __IO uint32_t ADR0;                       /*!< Offset: 0x00C (R/W)  I2C Slave Address Register 0 */
  __IO uint32_t SCLH;                       /*!< Offset: 0x010 (R/W)  SCH Duty Cycle Register High Half Word */
  __IO uint32_t SCLL;                       /*!< Offset: 0x014 (R/W)  SCL Duty Cycle Register Low Half Word */
  __O  uint32_t CONCLR;                     /*!< Offset: 0x018 (R/W)  I2C Control Clear Register */
  __IO uint32_t MMCTRL;                     /*!< Offset: 0x01C (R/W)  Monitor mode control register */
  __IO uint32_t ADR1;                       /*!< Offset: 0x020 (R/W)  I2C Slave Address Register 1 */
  __IO uint32_t ADR2;                       /*!< Offset: 0x024 (R/W)  I2C Slave Address Register 2 */
  __IO uint32_t ADR3;                       /*!< Offset: 0x028 (R/W)  I2C Slave Address Register 3 */
  __I  uint32_t DATA_BUFFER;                /*!< Offset: 0x02C (R/ )  Data buffer Register */
  __IO uint32_t MASK0;                      /*!< Offset: 0x030 (R/W)  I2C Slave address mask register 0 */
  __IO uint32_t MASK1;                      /*!< Offset: 0x034 (R/W)  I2C Slave address mask register 1 */
  __IO uint32_t MASK2;                      /*!< Offset: 0x038 (R/W)  I2C Slave address mask register 2 */
  __IO uint32_t MASK3;                      /*!< Offset: 0x03C (R/W)  I2C Slave address mask register 3 */
} LPC_I2C_TypeDef;
If LPC_I2C_TypeDef is using different register names, you are not using the original CMSISv2_LPC17xx :eek:

Then it's time to delete it and import the original from NXP_LPCXpresso1769_MCB1700_2011-02-11.zip in your example folder
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by hcanova on Thu Nov 10 08:52:58 MST 2011

Quote: Zero
As mentioned above, this project is working here with CMSISv2_LPC17xx :rolleyes:

If you haven't changed project settings meanwhile, you are not using the original CMSISv2_LPC17xx, especially its LPC17xx.h. Therefore this register names can't be found there and your compiler is nagging  :eek:





i'm notsure now, i tried many things here, you can show me how i can modify this project to work

thanks a lot
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Ex-Zero on Thu Nov 10 08:18:56 MST 2011
As mentioned above, this project is working here with CMSISv2_LPC17xx :rolleyes:

If you haven't changed project settings meanwhile, you are not using the original CMSISv2_LPC17xx, especially its LPC17xx.h. Therefore this register names can't be found there and your compiler is nagging  :eek:
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lpcware
NXP Employee
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Content originally posted in LPCWare by hcanova on Thu Nov 10 07:59:20 MST 2011
my version is v4.1.0 build 190

attached my build log

many error occur
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lpcware
NXP Employee
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Content originally posted in LPCWare by Ex-Zero on Thu Nov 10 07:47:59 MST 2011

Quote: hcanova
CMSISv2[COLOR=Red]p30[/COLOR]_LPC17xx



Sorry I don't know this version :eek:

I'm still working with CMSISv2[COLOR=Red]p00[/COLOR]_LPC17xx :rolleyes:
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lpcware
NXP Employee
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Content originally posted in LPCWare by hcanova on Thu Nov 10 07:35:50 MST 2011

Quote: Zero
Your I2C project is compiling without problems here (LPCXpresso v4.1.0 Build 190) :)

Did you import and build CMSISv2_LPC17xx?

In CMSISv2[COLOR=Red]p00[/COLOR]_LPC17xx this register is named I2STAT :eek:



zero

i'm using CMSISv2[COLOR=Red]p00[/COLOR]_LPC17xx

i will verify my LPCXpresso version
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lpcware
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Content originally posted in LPCWare by hcanova on Thu Nov 10 07:33:40 MST 2011

Quote: Zero
And why do you include Redlib (semihost) library :eek:



zero

I did not include this library,
this code is an example code without modification

thanks
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lpcware
NXP Employee
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Content originally posted in LPCWare by Ex-Zero on Thu Nov 10 07:18:07 MST 2011
Your I2C project is compiling without problems here (LPCXpresso v4.1.0 Build 190) :)

Did you import and build CMSISv2_LPC17xx?

In CMSISv2[COLOR=Red]p00[/COLOR]_LPC17xx this register is named I2STAT :eek:
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lpcware
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Content originally posted in LPCWare by Ex-Zero on Thu Nov 10 06:51:14 MST 2011
And why do you include Redlib (semihost) library :eek:
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lpcware
NXP Employee
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Content originally posted in LPCWare by hcanova on Thu Nov 10 06:45:30 MST 2011

Quote: Zero
Are you aware that you are using semihosting in your UART project?



Hi Zero

in my project i'm not using semihosting

Thanks

Henrique
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lpcware
NXP Employee
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Content originally posted in LPCWare by Ex-Zero on Thu Nov 10 06:40:08 MST 2011
Are you aware that you are using semihosting in your UART project?
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