LPC1768 secondary bootloader

[lpcware]

Content originally posted in LPCWare by nagalakshmi on Thu Feb 09 21:41:33 MST 2012
Hi,
we are using secondary booloader for loading the code from external flash to internal flash.we are using the internal flash location from 0x10000 to 0x7ffff.its writing the code from external flash to internal flash,while jumping to application code 0x10000 it is hanging.

we are using this code to jump to application
[SIZE=2]SCB->[/SIZE][SIZE=2][COLOR=#0000c0][SIZE=2][COLOR=#0000c0]VTOR[/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] = (USER_FLASH_START & 0x1FFFFF80);[/SIZE]
[SIZE=2][SIZE=2]p = ([/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]unsigned[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] *)(USER_FLASH_START+4);[/SIZE]
[SIZE=2][SIZE=2]user_code_entry = ([/SIZE][B][SIZE=2][COLOR=#7f0055][SIZE=2][COLOR=#7f0055]void[/B][/COLOR][/SIZE][/COLOR][/SIZE][SIZE=2] *)(*p) ;[/SIZE]
[SIZE=2][SIZE=2]user_code_entry();

please reply
[/SIZE][/SIZE][/SIZE][/SIZE]

[lpcware]

Content originally posted in LPCWare by dariush_abbasi868 on Mon Jun 08 01:33:08 MST 2015
hello ,
I use this for lpc1768 secondary bootloader by uart ,
I am using debuger also to sense what is readly hapen ,
In jumping to application address I used :

  asm("LDR SP,[R0]"); //Load new stack pointer address
    asm("LDR PC,[R0,#4]");//Load new program counter address

I checked R0 is ok and it is 0xa000 that is the address of my application
but sp has a wrong value ( I think ) what it should be exactly ?

[lpcware]

Content originally posted in LPCWare by FlySnake on Sat Feb 11 01:45:41 MST 2012
Works for me (unlike that example):
1. delay
2. switch to IRC oscillator, disable PLL
3. delay
4. reset pipeline and sync bus & memory access
5. set new PC and SP

void execute_user_code(void)
{
uint32_t addr=(uint32_t)USER_FLASH_START;
// delay
delay_loop(3000000);
// relocate vector table
SCB->VTOR = (addr & 0x1FFFFF80);
// switch to RC generator
LPC_SC->PLL0CON = 0x1; // disconnect PLL0
LPC_SC->PLL0FEED = 0xAA;
LPC_SC->PLL0FEED = 0x55;
while (LPC_SC->PLL0STAT&(1<<25));
LPC_SC->PLL0CON = 0x0;    // power down
LPC_SC->PLL0FEED = 0xAA;
LPC_SC->PLL0FEED = 0x55;
while (LPC_SC->PLL0STAT&(1<<24));
LPC_SC->FLASHCFG &= 0x0fff;  // This is the default flash read/write setting for IRC
LPC_SC->FLASHCFG |= 0x5000;
LPC_SC->CCLKCFG = 0x0;     //  Select the IRC as clk
LPC_SC->CLKSRCSEL = 0x00;
LPC_SC->SCS = 0x00;    // not using XTAL anymore
delay_loop(1000);
// reset pipeline, sync bus and memory access
__asm (
    "dmb\n"
    "dsb\n"
    "isb\n"
    );
boot(addr);
}

static void boot(uint32_t a)
{
__asm (
"LDR SP, [R0]\n"
"LDR PC, [R0, #4]\n"
);
}

static void delay_loop(uint32_t count)
{
volatile uint32_t j;
for(j=0; j<count; ++j)
del=j; // volatiles, so the compiler will not optimize the loop
}