Content originally posted in LPCWare by Luis Digital on Thu Mar 25 06:14:28 MST 2010
Quote: tkreyche
[FONT=Arial][SIZE=2]I don't see anyone (Leon's ref design or the 1114 xpresso board) implementing this suggestion from the manual. ??? thanks, Tom[/SIZE][/FONT]
[I][FONT=Arial][SIZE=2]Pin PIO0_1 that is used as hardware request for ISP requires special attention. Since
PIO0_1 is in high impedance mode after reset, it is important that the user provides
external hardware (a pull-up resistor or other device) to put the pin in a defined state.
Otherwise unintended entry into ISP mode may occur.[/SIZE][/FONT][/I]
You're right. But the chip does not enter ISP. Apparently the chip does not get its low logic state easily.
In tests I have conducted with other chips, and MOSFETs, the gate tends to be loaded with positive charge, while it is floating (no connection).
That might be the explanation, but NXP has the last word on this.