LPC1115 UART RX data read

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LPC1115 UART RX data read

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by yuezhang on Wed Nov 12 09:38:23 MST 2014
I'm using LPC1115 UART. When receiving data, I can see the data is in register U0RBR via debugger, but U0LSR[RDR] doesn't set. Is there any other registers related to U0LSR[RDR]?  Since  U0LSR[RDR] is not set, I can't judge if a valid data received or not.

Thanks
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by hanayuu on Sat Jul 25 15:54:58 MST 2015
See   IOCON_RXD_LOC ,  UM10398 manual Chapter8.
it's 1115 only

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by yuezhang on Wed Nov 12 15:44:07 MST 2014
Hi Ian,

I tried both. In software, U0LSR is always 0x60.

But I found another thing, as per your comment about FIFO enable. I did enable the FIFO by setting U0FCR[FIFOEN], but U0IIR[FIFOENABLE] is readback 0x00, which are suppose to be equivalent to U0FCR[0]. So frustrating.

By the way, there is no problem on data transmitting.

Thanks

Yue
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by IanB on Wed Nov 12 12:24:35 MST 2014
Are you testing the U0LSR[RDR] in your software, or are you just looking at it in the debugger?
Because, when the debugger reads U0RBR, U0LSR[RDR] gets reset, so it won't show the correct value.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by yuezhang on Wed Nov 12 11:46:21 MST 2014
Yes. I did set U0FCR[FIFO]. But there is no register to read back FIFO status.

Thanks.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by IanB on Wed Nov 12 11:10:22 MST 2014
Do you have the FIFOs turned on? It doesn't work with them turned off. (Fooled me for ages!)
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