Content originally posted in LPCWare by Artay on Mon Jul 18 06:57:06 MST 2011
Hello all,
I thought I would continue in this thread rather than starting a new one. I am confused about Interrupt enable/disable as well.
My problem seems to be that interrupt is enabled and disabled at the same time, which sounds impossible
Here is the relevant part of my code:
NVIC_EnableIRQ(1);
// NVIC_EnableIRQ(TIMER0_IRQn);
(I commented out the bottom one just to try an alternative, but obviously they produce the same result.)
Now when I look up the NVIC register during debugging, that statement causes both the SETENA0 and CLRENA0 registers to go to 0x00000002 and 0x00000002.
I am assuming SETENA0 and CLRENA0 stand for Interrupt Set-Enable Register 0 and Interrupt Clear-Enable Register 0 registers, which seem to be for enabling and disabling the peripheral interrupts respectively. So I'm completely confused about how those two registers can be set by the same statement.
Many thanks for any insight into this.
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OH never mind. Actually 1 on the interrupt clear-enable register indicates that the particular interrupt is enabled. 0 would have indicated the interrupt is disabled. So yes, the two registers are supposed to match. Sorry if that took up anybody's time and thanks.
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Just in case somebody experiences the same problem, the reason I ended up going through the process of looking at the registers is because my timer didn't seem to initialize properly. As it turns out, that happened because after resetting the timer control register (TCR), I did not release the reset. As the manual (which has a typo) says, The counters remain reset until TCR[1] is returned to zero. So this is the sequence that seems to be needed:
LPC_TIM0->TCR |= 1 << 1; // Reset Timer0
// timer control register (TCR) bit 1 (Counter Reset), bit
LPC_TIM0->TCR &= ~(1<<1); // release reset *IMPORTANT*
NVIC_EnableIRQ(1);
//NVIC_EnableIRQ(TIMER0_IRQn); // Enable timer interrupt
// this is in core_cm3.h
// the path to it is thru lpc17xx_nvic.c --> lpc17xx.h --> core_cm3.h
LPC_TIM0->TCR |= 1 << 0; // Start timer
// timer control register (TCT) bit 0(Counter Enable)
At least that's how it worked for me.
