Improving deep-sleep performance on the LPC1114

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Improving deep-sleep performance on the LPC1114

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lpcware
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Content originally posted in LPCWare by ktownsend on Tue Feb 23 17:08:49 MST 2010
I've been testing out a prototype design with an LPC1114 + 868MHz transceiver, and since low-power is the main reason I opted for the 1114, I was a bit disappointed with the results in deep sleep mode. I'm sure that there is significant room for improvement in the SW, but I was wondering if anyone else has been working with the sleep modes to be able to give some tips on getting the power consumption as low as possible in SW (the HW is obviously another issue entirely).

For the entire board, I'm using around 4.4mA at 12MHz, and when I go into deep-sleep mode it drops to around 1.9mA, shutting off the following peripherals:

pmuSleep(pmuSleepMode_DeepSleep, 
  SCB_PDSLEEPCFG_SYSPLL_PD |
  SCB_PDSLEEPCFG_WDTOSC_PD |
  SCB_PDSLEEPCFG_ADC_PD |
  SCB_PDSLEEPCFG_BOD_PD);


I want to use a timer to raise an interrupt every 15 minutes, for example, to wake the device up to check for messages, and then go back into deep sleep. Does anyone have any suggestions about configuring this to get the power consumption as low as possible without having to go into power down mode (which is nice at <0.1mA, but fairly limited in that it can only be woken up with the WAKEUP pin).

I've been testing a number of combinations, but if someone can suggest a solid starting point for a common scenario like this it would save me some grunt work.
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lpcware
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Content originally posted in LPCWare by hfischer on Wed Mar 10 08:43:12 MST 2010
Hi,

I am using the LPCXpresso Board with the lpc1114.
My aim is, to reduce the current consumption under the high limit of 10micro Ampere (10 ¯6).

I think there are two ways to make it work.
One is the already mentioned way, to use a Timer and deep sleep mode, trigger an matchpin(PWM peak) and capture this pin in a loopback with a wakeup GPIO Pin (i.e GPIO_2).

It was possible to reduce the current to 11,8 microAmpere with this solution. I am not very happy with this, i thought the lpc1114 could be reduced to a very low current without losing software-controll.

So i tried the second method. The Watchdog timer.
So none of the AHB/APB has to be powered or clocked excepting the BIT0 and the WDT-Osc. Which would save a bit more current.
Now i have some problems, i dont want to lose information because of Reset. Resetting is not the problem, just enable, give counter-value and config to reset on match. This works fine especially in deep sleep mode, with disabled peripheries and clocks. But this is not the way i want to.
I tried out the wdt-interrupt mode but this wont work in deep sleep mode. The interrupt is not pending in deep sleep mode. when i set the SCR Bit to normal "sleep" Mode everything is working finde.

Do anyone know how to use the wdt timer  match interrupt in deep sleep mode to wakeup only using software?

So far
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lpcware
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Content originally posted in LPCWare by rkiryanov on Wed Mar 03 06:38:24 MST 2010
NXP, I have a question about watchdog oscillator, FREQSEL field.

UM: FREQSEL = 0 is not described
lpc11xx.cmsis.zip/CMSISv1p30_LPC11xx/src/system_LPC11xx.c: FREQSEL = 0 -  400KHz.

Is code from system_LPC11xx.c correct?
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lpcware
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Content originally posted in LPCWare by ktownsend on Mon Mar 01 19:47:55 MST 2010

Quote: NXP_USA
That is correct, a timer can wake up the LPC1343 from Deep Sleep via loopback through the I/O pin. One difference between the LPC1343 and LPC1114 families is that the LPC111x has fewer start logic pins (13 v.s. 40). It is possible that the wakeup function you need is not configured to a pin on the LPC111x in which case you would need to tie two pins together- one with the pin function (RXD on P1.6 for example) and one with the start logic functionality.

-NXP



Indeed, on the 1114 the startup logic pins are 0.0..11 and 1.0.  I've been using the ISP pin (0.1) since it was free, fits in that range, and has CT32B0_MAT2 on it.
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lpcware
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Content originally posted in LPCWare by ktownsend on Mon Mar 01 19:39:36 MST 2010

Quote: rkiryanov
WDTOSC, all other periperals are disabled, sleep mode
0.5 MHz/16, SysTick: 2 Hz - 500uA
2.0 MHz/2, SysTick: 10 Hz - 700uA



I don't have the board hooked up right now, but that seems a bit high.  I think I was getting around 250uA at 12MHz using the external crystal, and I'm sure it can go lower than that.  I need to hook it all back up, though, and try to get the wakeup code working properly. It's been a PITA since I can't use a HW debugger.  I'd like to try to get it to around 100uA if possible, which should be low enough for my own needs.  I'll get a new PCB in tommorow that should have slightly lower power consumption ... I'll put one together and test it out.
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lpcware
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Content originally posted in LPCWare by rkiryanov on Mon Mar 01 11:34:46 MST 2010
WDTOSC, all other periperals are disabled, sleep mode
0.5 MHz/16, SysTick: 2 Hz - 500uA
2.0 MHz/2, SysTick: 10 Hz - 700uA
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lpcware
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Content originally posted in LPCWare by rkiryanov on Sun Feb 28 02:29:32 MST 2010

Quote: KTownsend
[B]Update 2:[/B] It seems you can indeed wakeup from a timer (otherwise, you may as well just go directly to deep power down) ... you can use the watchdog oscillator to driver the timer, and with a timer match toggle the GPIO to wake the device.  I'm going to test it now, but that should work well for me.



UM: During Deep-sleep mode, the processor state and registers, peripheral registers, and internal SRAM values are maintained, and the logic levels of the pins remain static.
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lpcware
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Content originally posted in LPCWare by rkiryanov on Sun Feb 28 01:43:38 MST 2010
NXP, I have a question about watchdog oscillator, FREQSEL field.

UM: FREQSEL = 0 is not described
lpc11xx.cmsis.zip/CMSISv1p30_LPC11xx/src/system_LPC11xx.c: FREQSEL = 0 - 400KHz.

Is code from system_LPC11xx.c correct?
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lpcware
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Content originally posted in LPCWare by NXP_USA on Sun Feb 28 00:10:21 MST 2010

Quote: KTownsend
The LPC111x can wake up from Deep-sleep mode without the use of interrupts from peripherals by monitoring the inputs to the start logic (see Section 3–8.3).

...
[B]Update 2:[/B] It seems you can indeed wakeup from a timer (otherwise, you may as well just go directly to deep power down) ... you can use the watchdog oscillator to driver the timer, and with a timer match toggle the GPIO to wake the device.  I'm going to test it now, but that should work well for me.



That is correct, a timer can wake up the LPC1343 from Deep Sleep via loopback through the I/O pin. One difference between the LPC1343 and LPC1114 families is that the LPC111x has fewer start logic pins (13 v.s. 40). It is possible that the wakeup function you need is not configured to a pin on the LPC111x in which case you would need to tie two pins together- one with the pin function (RXD on P1.6 for example) and one with the start logic functionality.

-NXP
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lpcware
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Content originally posted in LPCWare by ktownsend on Fri Feb 26 03:31:58 MST 2010

Quote: rkiryanov
You cannot wake up with timer from deep sleep:



The LPC111x can wake up from Deep-sleep mode without the use of interrupts from peripherals by monitoring the inputs to the start logic (see Section 3&#8211;8.3).

Are you sure that means you can't wake up from a timer interrupt? The wording to me sounds like it's in addition to an interrupt (providing the block is enabled). I.e., you can use an interrupt ... but you can ALSO wake it up without an interrupt using one of the possible GPIO pins (GPIO0 and 1.1 or 1.0 off the top of my head, and I think any GPIO on the 1343). I'm really just guessing for some of this, though, since the UM isn't always very clear. I'm learning by trying everything out.

[B]Update:[/B] It seems you may be right (though I'll need to look into it a bit more). I can easily wakeup from a timer in sleep mode, but I haven't been able to do the same from deep sleep. I'll have to spend some more time in the UM and looking through some of the documentation from ARM to get a better sense of exactly what options you have, though. Can a timer be configured to change a pin state, and left running in deep-sleep, for example? Simple sleep mode doesn't really offer enough power savings to be useful to me. I can always find a HW method to toggle the external WAKEUP pin every x seconds, and go into power down mode for the lowest possible power, but this is exactly what I was hoping to avoid since I wanted to be able to control the deep-sleep/wakeup purely from SW.

[B]Update 2:[/B] It seems you can indeed wakeup from a timer (otherwise, you may as well just go directly to deep power down) ... you can use the watchdog oscillator to driver the timer, and with a timer match toggle the GPIO to wake the device.  I'm going to test it now, but that should work well for me.
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lpcware
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Content originally posted in LPCWare by rkiryanov on Fri Feb 26 03:13:20 MST 2010

Quote: KTownsend
but you have other problems putting two  supercaps in series to get above 2.5V, like ensuring equal charging,  etc



korchip.com - look for already assembled pairs - 5.5V (e.g., SCDCL5R5155, 1.5F).


Quote: KTownsend
deep sleep



You cannot wake up with timer from deep sleep:


Quote:
The LPC111x can wake up from Deep-sleep mode without the use of interrupts from peripherals by monitoring the inputs to the start logic (see Section 3–8.3).

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lpcware
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Content originally posted in LPCWare by ktownsend on Fri Feb 26 03:06:29 MST 2010

Quote: rkiryanov
And 25F is the super cool supercap.



Just don't lick it when it's fully charged or your tongue will probably explode :p

It looks interesting on paper, but it's something I'll have to test out in practice to see how it really works out.  I'm worried about the life of the supercap as well and temperature, amongst other things.  A 1.8V system with a 2.5V supercap is still cutting it closer than I'd like for something capable of exploding, but you have other problems putting two supercaps in series to get above 2.5V, like ensuring equal charging, etc.  It's next on the ToDo list, though.  I've designed the sensor nodes in a way that the power cell is independent of the node anyway ... if the supercap/solar combination doesn't work, I can easily go to a LIPO or NIMH battery as well, though that has it's own problems.  I really need to get <100µA first, though, in deep sleep, and work out all the details with the wakeup.
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lpcware
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Content originally posted in LPCWare by rkiryanov on Fri Feb 26 02:26:10 MST 2010
You calculations are wrong. Backup time calculted as

T = C * (U_charge - U_cutoff - I * R_supercap) / (I + I_leakage)

And 25F is the super cool supercap.
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lpcware
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Content originally posted in LPCWare by ktownsend on Fri Feb 26 02:17:02 MST 2010

Quote: rkiryanov
How do you plan to start from 12MHz IRC to deep sleep? LPC1114 will draw all energy from supercap on morning.



I need to modify the code to switch to the IRC first, as the UM suggests ... I'm just comparing different settings to get an idea of how much power each peripheral is consuming. I've already put together some code to handle all of this, I've just been busy trying to get a sense of which peripherals should be left on and which should be disabled, etc.

As for the supercap, I think a large enough one should be more than enough for a couple days power combined with an efficient solar cell. Something like a 25F cap can make it through more than a day without sunlight. If I can get to around 100µA total in deep sleep, I'll only be consuming ~.166mAh with a 240:1 duty cycle.

With a 25F supercap on a 1.8V system, I should have 81 joules (E = 1.8² * 25 = 81). 81 joules / 1.8V = 45A; 45 / 3600 seconds = 0.0125Ah (or 12.5mAh).

Those are ideal figures, but if a 25F supercap on a 1.8V system will give me 12.5mAh, that should be enough to power my system for ~75 hours. If we don't have any sun during 75 hours we'll have far bigger problems than my little embedded device. :-)

That said ... it's all theoretical. I need to test this all out with a real board and see if it really works out. But even if it only performs half as well, that should still be sufficient, and having a battery-less system definately has a lot of advantages.

Here's a blog post I put together a while back thinking about this: http://www.microbuilder.eu/blog/09-11-13/Using_Supercapacitors_as_a_Power_Source.aspx
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lpcware
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Content originally posted in LPCWare by rkiryanov on Fri Feb 26 01:57:51 MST 2010
How do you plan to start from 12MHz IRC to deep sleep? LPC1114 will draw all energy from supercap on morning.
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lpcware
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Content originally posted in LPCWare by ktownsend on Fri Feb 26 01:27:38 MST 2010

Quote: rkiryanov
On LPC2000 pull up/pull down works with SPI.



Just as a precaution, I've been disabling the internal resistor on any pin I used.  I wish this would have been the default state, though.  The internal resistors are very useful and are a good way to reduce the total BOM count (and this required surface area) ... but it's troublesome to add one more potential problem by making them almost all default to enabled and pulled high, just to compensate for people writing bad code and not controlling their pin states properly.
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lpcware
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Content originally posted in LPCWare by ktownsend on Fri Feb 26 01:25:03 MST 2010

Quote: rkiryanov
Also, is it possible to wake up with timer from deep sleep?



Sorry ... I missed that last part.  I haven't yet gotten around to testing the wakeup code.  Obviously you can't use a HW debugger for that, so I've been putting it off just trying to get the deep sleep consumption as low as possible.  When I said I wasn't sure of the consequences of shutting certain things off, etc., thats what I meant ... I need to play around with it and see what's possible for wakeup, etc., and how long it takes.  I'll probably start working on that tommorow.  There are a number of issues I'll need to deal with the the RTOS level as well going into and coming out of deep sleep.
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lpcware
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Content originally posted in LPCWare by rkiryanov on Fri Feb 26 01:22:12 MST 2010

Quote: KTownsend
do I still need to clear the internal resistor ...



On LPC2000 pull up/pull down works with SPI.
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lpcware
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Content originally posted in LPCWare by ktownsend on Fri Feb 26 01:19:08 MST 2010

Quote: rkiryanov
Did you configured unused pins as GPIO, out, low? Floating pins can consume some current.



I have to go through it pin by pin to determine which pins I need to be in which state, and then explicitly set the rest, but there are definately a few µA that can be shaved off with that.  Up until now I've been trying to make the code as generic as possible, so didn't get into configuring things pin by pin for this particular project.

I find it kind of annoying that the internal pull-up resistors are all enabled by default, though, since it adds more code and a potential problem for people who don't pay enough attention to the UM.  I understand the idea behind the decision ... but they are trying to compensate for bad SW design in HW, and just making things more work in the long run.  I've been wondering as well ... do the internal pull ups ONLY affect GPIO?  If I'm using a pin as SPI, for example, do I still need to clear the internal resistor ... or is that only necessary when the pin multiplexing is set to GPIO?
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lpcware
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Content originally posted in LPCWare by rkiryanov on Fri Feb 26 01:12:16 MST 2010

Quote: KTownsend
This is what I'm using at present:



Did you configured unused pins as GPIO, out, low? Floating pins can consume some current. Also, is it possible to wake up with timer from deep sleep?
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lpcware
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Content originally posted in LPCWare by ktownsend on Fri Feb 26 01:04:46 MST 2010
I've got it down to 0.28mA turning off pretty much everything, though I need to do some SW test to determine the consequences of that. On the board I have the following:

MCP130T: ~45µA
ADP121: ~30µA
AT86RF212: <1µA (sleep)

I used 10µF ceramic caps instead of tantalums, etc., to save power, and was careful with discrete selection, but that means that at .28mA, minus external components, the LPC1114 and remaining components is using around 0.2mA in deep sleep at present, and I suspect there is still room for improvement ... I just need to do a lot of testing to shave off that last little bit. I think I can eventually get the total board to around 0.1mA though, which should be alright for me. I was planning on running at ~240:1 duty cycle, waking up maybe 5s every 20 minutes. At those power rates I can easily run from a small solar cell with a 2.5V supercapacitor (the board is design for 1.8V) forever ... no battery needed.

That said ... it would have been nice to have more information on getting the most from the deep sleep mode, and some examples from NXP or an app note. It's been a lot of trial and error, and I've had to make some decisions where I wasn't 100% clear on the consequences.

This is what I'm using at present:

    // Enter deep sleep mode
    pmuDeepSleep(SCB_PDSLEEPCFG_IRCOUT_PD |
                 SCB_PDSLEEPCFG_IRC_PD |
                 SCB_PDSLEEPCFG_FLASH_PD |
                 SCB_PDSLEEPCFG_BOD_PD |
                 SCB_PDSLEEPCFG_ADC_PD |
                 SCB_PDSLEEPCFG_WDTOSC_PD |
                 SCB_PDSLEEPCFG_SYSPLL_PD);
 
...
void pmuDeepSleep(U32 sleepCtrl)
{
  SCB_PDAWAKECFG = SCB_PDRUNCFG;
  // Datasheet indicates bits 11 and 12 must also be set to 1 for DS
  // and that bit 9 must be set to 0
  sleepCtrl &= ~(1 << 9);               // 9  = MAIN_REGUL_PD
  sleepCtrl |= (1 << 11) | (1 << 12);   // 12 = LP_REGUL_PD, 11 = ???
  SCB_PDSLEEPCFG = sleepCtrl;
  SCB_SCR |= SCB_SCR_SLEEPDEEP;
  __asm volatile ("WFI");
  return;
}
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