Content originally posted in LPCWare by Terje on Thu Apr 12 00:14:35 MST 2012
[FONT=Arial][COLOR=Black][SIZE=3]Hello.
I'm trying to understand how the example code is calculating the parameters to set the baudrate, but neither the code from CodeRed nor Keil looks correct to me (They are not the same, by the way). I hope some of you can explain it to me.
The example code from CodeRed is as follows
[I]#define SystemFrequency SystemCoreClock
regVal = LPC_SYSCON->UARTCLKDIV;
Fdiv = (((SystemFrequency/LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate[/I]
While the code from Keil is:[/SIZE][/COLOR][/FONT][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [COLOR=Black][I][FONT=Arial][SIZE=3]regVal[/SIZE][/FONT][FONT=Arial][SIZE=3]=[/SIZE][/FONT][FONT=Arial][SIZE=3]LPC_SYSCON[/SIZE][/FONT][FONT=Arial][SIZE=3]->[/SIZE][/FONT][FONT=Arial][SIZE=3]UARTCLKDIV[/SIZE][/FONT][FONT=Arial][SIZE=3];[/SIZE][/FONT][FONT=Arial][SIZE=3]
[/SIZE][/FONT][FONT=Arial][SIZE=3]Fdiv[/SIZE][/FONT][/I] [I][FONT=Arial][SIZE=3]=[/SIZE][/FONT][FONT=Arial][SIZE=3](([/SIZE][/FONT][FONT=Arial][SIZE=3]SystemCoreClock[/SIZE][/FONT][FONT=Arial][SIZE=3]/regVal)/[/SIZE][/FONT][FONT=Arial][SIZE=3]16[/SIZE][/FONT][FONT=Arial][SIZE=3])/baudrate[/SIZE][/FONT][/I][/COLOR][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [FONT=Arial][COLOR=Black][SIZE=3]I assume the calculation should be[/SIZE][/COLOR][/FONT][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [COLOR=Black][I][FONT=Arial][SIZE=3]Fdiv = ((UART_PCLK)/16)/baudrate[/SIZE][/FONT][/I][/COLOR][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [FONT=Arial][COLOR=Black][SIZE=3]So the question is how to calculate UART_PCLK.[/SIZE][/COLOR][/FONT][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [FONT=Arial][COLOR=Black][SIZE=3]CodeRed:[I] UART_PCLK = (SystemCoreClock/SYSAHBCLKDIV)/UARTCLKDIV[/I][/SIZE][/COLOR][/FONT][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [FONT=Arial][COLOR=Black][SIZE=3]Keil: [I]UART_PCLK = (SystemCoreClock/UARTCLKDIV)[/I][/SIZE][/COLOR][/FONT][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [FONT=Arial][COLOR=Black][SIZE=3]As SYSAHBCLKDIV = 1 in the example, the results are the same, but this is not necessarily the case in my program.[/SIZE][/COLOR][/FONT][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [FONT=Arial][COLOR=Black][SIZE=3]According to the CGU block diagram (Fig 3) in the manual I thought it should be:[/SIZE][/COLOR][/FONT][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [COLOR=Black][I][FONT=Arial][SIZE=3]UART_PCLK = (SystemCoreClock*SYSAHBCLKDIV)/UARTCLKDIV[/SIZE][/FONT][/I][/COLOR][FONT=Arial][COLOR=Black][SIZE=3]
[/SIZE][/COLOR][/FONT] [FONT=Arial][COLOR=Black][SIZE=3]I am using LPC1343.[/SIZE][/COLOR][/FONT]
