Execution time for LPC1317 Set instruction

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Execution time for LPC1317 Set instruction

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Deepak Bansal on Tue Sep 25 22:00:24 MST 2012
1. I am running CPU at 72Mhz & same clock given to GPIO with divide by 1 clock divider.
So GPIO clock is also 72Mhz.
But when I use
LPC_GPIO->SET[0] = 0x04;
It is taking greater than 70 nsec time.
Should't it be lesser than that, as it is single cycle inst.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by daniel.widyanto on Tue Oct 09 21:22:03 MST 2012
Ask Keil question in Keil forum (http://www.keil.com/forum/). This is LPCXpresso forum
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Deepak Bansal on Fri Sep 28 22:08:26 MST 2012
I have checked its disassembly,

LPC_GPIO->SET[tft_rst_port] = tft_rst_pin;

0x00000DAE F44F4180  MOV      r1,#0x4000
0x00000DB2 4895      LDR      r0,[pc,#596]  ; @0x00001008
0x00000DB4 3080      ADDS     r0,r0,#0x80
0x00000DB6 6041      STR      r1,[r0,#0x04]


Single instruction SET, has 4 cycle.
Any single cycle inst to set & clr pin, in C.

Or
How could I add assembly in C.               
I am using Keil V 4.54.0.0
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by micrio on Wed Sep 26 06:51:23 MST 2012
If you waant to run at full clock speed you must run from cache or RAM.   Flash memory imposes wait states.   If your loop is very small then it might fit in cache.   For cache, address alignment and size matter.

If that won't work, then you can move the critical code into RAM and run it there.     RAM runs without wait states.

There are threads that have discussed these issues.

Pete.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by TheFallGuy on Tue Sep 25 23:52:40 MST 2012
1. look at the code the compiler generated - it will be more than one instruction
2. It will be much worse when compiling for Debug. If you want to see smaller/faster code, compile for Release.
3. If you are really worried about performance in critical sections, write in assembler.

See the Code Red faq on optimization
http://support.code-red-tech.com/CodeRedWiki/CompilerOptimization
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