Clock and uart

キャンセル
次の結果を表示 
表示  限定  | 次の代わりに検索 
もしかして: 

Clock and uart

1,144件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by unnati on Sat Apr 03 05:30:03 MST 2010
hi,

i am facing the following 3 problems for LPC1114:

1)i use IRC as main clock, pre-scale as 0 and MR0 as 30000(decimal) for generating 2.5msec delay using timer16B0. but i get 0.625 msec. i also tried  pre-scale as11 and MR0 as 2500(decimal), the result is the same ie 0.625msec.

if i use prescale as 11 and MR0 as 10000 i get 2.5 msec.

2)similar behaviour is observed when i try to set the baud rate for UART.

effectively a factor of 4 is inoperation.

3) i am not getting UART INTERRUPT in receive mode and hence ISR for receive is not operating. i used the code given in the uart example for LPC1114.

if anyone has a working tested code for UART receive and transmit help is requested.
0 件の賞賛
返信
8 返答(返信)

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by unnati on Wed Oct 27 07:38:08 MST 2010

Quote:

LPC_SYSCON->MAINCLKSEL = 0x00; //0-IRC Osc,1-PLL i/p,2-WDT,3-PLL o/p
LPC_SYSCON->MAINCLKUEN = 0x01;
LPC_SYSCON->MAINCLKUEN = 0x00;
LPC_SYSCON->MAINCLKUEN = 0x01;
while (!(LPC_SYSCON->MAINCLKUEN & 0x01));
LPC_SYSCON->CLKOUTCLKSEL = 0x00; // 0-IRC,1-Sys Osc,2-WD Osc,3-Main clk
LPC_SYSCON->CLKOUTCLKSEL = 0x01;
LPC_SYSCON->CLKOUTCLKSEL = 0x00;
LPC_SYSCON->CLKOUTCLKSEL = 0x01;



in the above, instead of toggling CLOCKOUTSEL u should toggle the CLOCKOUTUEN. ie;
LPC_SYSCON->CLKOUTUEN = 0x01;
LPC_SYSCON->CLKOUTUEN = 0x00;
LPC_SYSCON->CLKOUTUEN = 0x01;
while (!(LPC_SYSCON->CLKOUTUEN & 0x01));

i think this shud help.
0 件の賞賛
返信

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by yateesh_me on Tue Oct 12 03:49:00 MST 2010
Hi unnati,


I'm doing serial communication test,the following is my code.
   #include "LPC11xx.h" 
#define IER_RBR         0x01
#define IER_THRE        0x02
#define IER_RLS         0x04 
#define LSR_RDR         0x01
#define LSR_THRE        0x20
#define BUFSIZE         0x40 
#define SystemFrequency SystemCoreClock
#define SystemCoreClock 12000000UL 
void UARTInit(unsigned int Baudrate);
void UARTSend(void);
void UARTRecv(void); 
volatile unsigned char  UARTBuffer[40],RECV; 
int main (void) {         UARTInit(9600);        
while (1)
{        
UARTRecv();         UARTSend();
        }
}
/*=========================================================================================*/
void UARTInit(unsigned int baudrate)
{        
unsigned int regVal;         unsigned int Fdiv;          
LPC_IOCON->PIO1_6 &= ~0x07;          /*  UART I/O config */         LPC_IOCON->PIO1_6 |= 0x01;           /* UART RXD */        
LPC_IOCON->PIO1_7 &= ~0x07;
        LPC_IOCON->PIO1_7 |= 0x01;           /* UART TXD */         
LPC_GPIO0->DIR |= (1<<1);        

LPC_IOCON->PIO0_1 &= ~0x07;      /*  UART I/O config */        
LPC_IOCON->PIO0_1 |= 0x01;           /* clock out*/         
LPC_SYSCON->SYSPLLCLKSEL = 0x00;    //0-IRC,1-SYS Osc        
LPC_SYSCON->SYSPLLCLKUEN = 0x01;        
LPC_SYSCON->SYSPLLCLKUEN = 0x00;        
LPC_SYSCON->SYSPLLCLKUEN = 0x01;         
LPC_SYSCON->MAINCLKSEL    = 0x00;    //0-IRC Osc,1-PLL i/p,2-WDT,3-PLL o/p        
LPC_SYSCON->MAINCLKUEN    = 0x01;
LPC_SYSCON->MAINCLKUEN    = 0x00;        
LPC_SYSCON->MAINCLKUEN    = 0x01;        
while (!(LPC_SYSCON->MAINCLKUEN & 0x01));         
LPC_SYSCON->CLKOUTCLKSEL = 0x00;     // 0-IRC,1-Sys Osc,2-WD Osc,3-Main clk        
LPC_SYSCON-j>CLKOUTCLKSEL = 0x01;        
LPC_SYSCON->CLKOUTCLKSEL = 0x00;        
LPC_SYSCON->CLKOUTCLKSEL = 0x01;         
LPC_SYSCON->SYSPLLCTRL = 0x00000180;        
LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);  // UART CLK enable        
LPC_SYSCON->UARTCLKDIV = 0x01;       /* divided by 1 , like pre-scaler*/         
LPC_UART->LCR = 0x83;                /* DLB=1, 8 bits, no Parity, 1 Stop bit */         regVal =
LPC_SYSCON->UARTCLKDIV;         

Fdiv = (((SystemCoreClock/LPC_SYSCON->SYSAHBCLKDIV)/regVal)/16)/baudrate ;
LPC_UART->DLM = Fdiv / 256;         LPC_UART->DLL = Fdiv % 256;         
LPC_UART->LCR = 0x03;        /* DLAB = 0 ,Disable access to divisor latches*/        
LPC_UART->FCR = 0x07;        /* Enable and reset TX and RX FIFO. */
regVal = LPC_UART->LSR;      /* Read to clear the line status. */          return;
}

void UARTSend()
{         
LPC_UART->THR = RECV;
        while ( !(LPC_UART->LSR & 0x40) //wait until TEMT=0,i.e. U0THR contains valid data


void UARTRecv()
{        
while(!(LPC_UART->LSR & (0x01)));        
RECV=LPC_UART->RBR;
}     

The following are my problems:
1. Is this code correct, in using  clocks?

2. I'm not getting 12Mhz signal at P0.1,why?

3. Using this  snippet I want to test serial communication,but I'm getting simulation  o/p only. I am not getting o/p from micro controller after dumping. why?


Any suggestions from you are of great help to me.....
In advance Thank you...
0 件の賞賛
返信

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by unnati on Sun Apr 04 23:09:38 MST 2010
i got both the clock as well as UART receive working successfully.

thank u so much brucesegal...:):)!!!
0 件の賞賛
返信

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by brucesegal on Sun Apr 04 13:56:38 MST 2010
With the values you've chosen it looks like the system core clock should be direct from the IRC oscillator.

The only problem I see is you  aren't toggling the MAINCLKUEN bit to update the MAINCLKSEL register as done in the CMSIS init


 LPC_SYSCON->MAINCLKSEL    = MAINCLKSEL_Val;     /* Select PLL Clock Output  */
  LPC_SYSCON->MAINCLKUEN    = 0x01;               /* Update MCLK Clock Source */
  LPC_SYSCON->MAINCLKUEN    = 0x00;               /* Toggle Update Register   */
  LPC_SYSCON->MAINCLKUEN    = 0x01;
  while (!(LPC_SYSCON->MAINCLKUEN & 0x01));       /* Wait Until Updated       */

  LPC_SYSCON->SYSAHBCLKDIV  = SYSAHBCLKDIV_Val;
  LPC_SYSCON->SYSAHBCLKCTRL = AHBCLKCTRL_Val;
  LPC_SYSCON->SSP0CLKDIV    = SSP0CLKDIV_Val;
  LPC_SYSCON->UARTCLKDIV    = UARTCLKDIV_Val;
  LPC_SYSCON->SSP1CLKDIV    = SSP1CLKDIV_Val;


I'm not sure about the UART receive except I would check for data ready like:

while (!(LPC_UART->LSR & LSR_RDR));
0 件の賞賛
返信

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by unnati on Sun Apr 04 08:28:38 MST 2010
thanx brucesegal

i have used the following code for clock settings:


Quote:

#include"LPC11xx.h"
#include"system_LPC11xx.h"
#include"core_cm0.h"

LPC_SYSCON->SYSMEMREMAP =   0x03;
LPC_SYSCON->SYSAHBCLKDIV =  0x01;
LPC_SYSCON->MAINCLKSEL =    0x00;
LPC_SYSCON->MAINCLKUEN =    0x00;
LPC_SYSCON->SYSOSCCTRL =    0x00;
LPC_SYSCON->SYSAHBCLKCTRL |= 0x5F;




can u tell me which clock will be selected through the above clock..i have written it for IRC clock.?

also for UART..i have used the following code for receiving 1 byte from hyperterminal and then transmitting the same.
if i use the default value in the variable "data" then i am able to transmit...but receive is not working...


Quote:

#include"LPC11xx.h"
#include"system_LPC11xx.h"
#include"core_cm0.h"

#define IER_RBR  0x01
#define IER_THRE 0x02
#define IER_RLS  0x04
#define IIR_PEND 0x01
#define IIR_RLS  0x03
#define IIR_RDA  0x02
#define IIR_CTI  0x06
#define IIR_THRE 0x01
#define LSR_RDR  0x01
#define LSR_OE  0x02
#define LSR_PE  0x04
#define LSR_FE  0x08
#define LSR_BI  0x10
#define LSR_THRE 0x20
#define LSR_TEMT 0x40
#define LSR_RXFE 0x80
int8_t  data;
int32_t regval;
system_config()
{
LPC_SYSCON->SYSMEMREMAP =   0x03;
LPC_SYSCON->SYSAHBCLKDIV =  0x01;
LPC_SYSCON->MAINCLKSEL =    0x00;
LPC_SYSCON->MAINCLKUEN =    0x00;
LPC_SYSCON->SYSOSCCTRL =    0x00;
//LPC_SYSCON->CLKOUTDIV =     0X78;
LPC_SYSCON->SYSAHBCLKCTRL |= 0x5F;
return;
}
UARTInit()
{
 
  NVIC_DisableIRQ(UART_IRQn);
  LPC_IOCON->PIO1_6 &= ~0x07;    /*  UART I/O config */
  LPC_IOCON->PIO1_6 |= 0x01;     /* UART RXD */
  LPC_IOCON->PIO1_7 &= ~0x07;
  LPC_IOCON->PIO1_7 |= 0x01;     /* UART TXD */
  /* Enable UART clock */
  LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
  LPC_SYSCON->UARTCLKDIV = 0x4;     /* divided by 4 */
  LPC_UART->LCR = 0x83;     /* 8 bits, no Parity, 1 Stop bit */
  LPC_UART->FDR =0x72;
  LPC_UART->DLM = 0x00;
  LPC_UART->DLL = 0x1E;
  LPC_UART->LCR = 0x03;  /* DLAB = 0 */
  LPC_UART->FCR = 0x07;  /* Enable and reset TX and RX FIFO. */
  /* Read to clear the line status. */
  regVal = LPC_UART->LSR;
  /* Ensure a clean start, no data in either TX or RX FIFO. */
// CodeRed - added parentheses around comparison in operand of &
  while (( LPC_UART->LSR & (LSR_THRE|LSR_TEMT)) != (LSR_THRE|LSR_TEMT) );
  while ( LPC_UART->LSR & LSR_RDR )
  {
regVal = LPC_UART->RBR; /* Dump data from RX FIFO */
  }

  return;
}
UARTSend()
{
     
   LPC_UART->THR = data;
   LPC_UART->TER=0x80;
  return;
}

uartreceive()
{
while(LPC_UART->LSR!=LSR_RDR)
{
}
regval=LPC_UART->LSR;
data=LPC_UART->RBR;
}

int main ()
{
system_config();
UARTInit();
uartreceive();
UARTSend()
label:
  {
   goto label;
  }
}




is any specific initailization required for receive mode??

thanx!!
0 件の賞賛
返信

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by brucesegal on Sat Apr 03 11:21:24 MST 2010
With the LPC1114 and using the supplied CMSIS examples the system core clock with no changes is 48mhz. This is by selecting the SYSTEM OSCILLATOR CLK and the SYSTEM PLL to generate the SYSTEM CORE CLOCK.

Your delay appears correct with that clock and the values you used for MR0

Here is the NXP/CodeRed uart setup code:

The call:
UARTInit(115200);


And some of the setup:

  /* Enable UART clock */
  LPC_SYSCON->SYSAHBCLKCTRL |= (1<<12);
  LPC_SYSCON->UARTCLKDIV = 0x1;     /* divided by 1 */

  LPC_UART->LCR = 0x83;             /* 8 bits, no Parity, 1 Stop bit */
  Fdiv = (((SystemCoreClock/LPC_SYSCON->UARTCLKDIV))/16)/baudrate ;

  LPC_UART->DLM = Fdiv / 256;
  LPC_UART->DLL = Fdiv % 256;
0 件の賞賛
返信

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by unnati on Sat Apr 03 05:47:17 MST 2010
i am using IRC as clock source and it is 12 MHz for LPC1114.
i have checked this by using CLOCKOUT pin and it is showing 100kHz when i use clockdivider as 120.

if the clock is 72 MHz the error factor should be 6. but i m getting a factor of 4.
0 件の賞賛
返信

1,027件の閲覧回数
lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Andrew24 on Sat Apr 03 05:37:10 MST 2010
hallo, if you dont change anything, which is set by default, the main clock runs at 72MHz (in LPC1343), according to it you can calculate new MR0 value.
0 件の賞賛
返信