when write to Ethernet Register, I got a reset

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when write to Ethernet Register, I got a reset

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by twicave on Sat Jun 13 00:00:40 MST 2015
I am working on LPC1768's Ethernet function, using LWIP protocol stack.
I have imported the lpcopen project "webserver.uvproj" into my own project.

when I first eliminated all compiler error, and make the project running on my own board.
the code doesn't work.

I traced the init process.found that when executed at:
LPC_EMAC->MAC1 = 2; (through .asm window)
PC pointer then reset to 0x0000;
(I set breakpoint at all exception routine's entry, no exception was captured)

Here is the question:
1.which condition can cause PC pointer reset?


hope someone can help me out.
(I am line by line checking the Initial process now, compared with the original project)
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by twicave on Sat Jun 13 01:33:43 MST 2015
wow! R2.
you may save me, thanks a lot.
that clock signal related code was deleted from my project. I think that will be the reason.

Thanks! May the force be with you, bro.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Sat Jun 13 01:29:47 MST 2015

Quote: twicave
Here is the question:
1.which condition can cause PC pointer reset?



Your hardware  :O

UM:

Quote:
10.16.1 Overview
The Ethernet block can transmit and receive Ethernet packets from an off-chip Ethernet PHY connected through the RMII interface.
Typically during system start-up, the Ethernet block will be initialized. Software initialization of the Ethernet block should include initialization of the descriptor and status arrays as well as the receiver fragment buffers. [color=#f00]Remark: when initializing the Ethernet block, it is important to first configure the PHY and insure that reference clocks (ENET_REF_CLK signal in RMII mode, or both ENET_RX_CLK and ENET_TX_CLK signals in MII mode) are present at the external pins and connected to the EMAC module (selecting the appropriate pins using the PINSEL registers) prior to continuing with Ethernet configuration.[/color] Otherwise the CPU can become locked and no further functionality will be possible. This will cause JTAG lose communication with the target, if debug mode is being used.

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by twicave on Sat Jun 13 01:28:44 MST 2015
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_ENET);

I did that.

the most strange thing is the PC pointer RESET to 0x0000.
I have no idea with that
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by capiman on Sat Jun 13 01:15:22 MST 2015
Have you powered up Ethernet controller?

Something like (copied from old source code, please check User Manual and other examples):
/* Power Up the EMAC controller. */
PCONP |= 0x40000000;
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