lpcxx address at reset

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lpcxx address at reset

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thieulam
Contributor III

Hello everyone. I am a new user of the NXP chips (coming from the PICs). I have doubts about what happens at the reset. In the pics on reset, the flash memory instruction is executed at address 0x0:

Line Address Opcode Label Disassembly

1 00000 040200 goto _reset

2 00002 000000 nop

3 00004 0029FC _DefaultInterrupt

4 00006 0029FC _DefaultInterrupt

Does the same thing happen in the lpc24xx chips? Reading the manual would seem so, but I can not figure out if the address 0x0 is related to the flash memory (lpc2468):

Disassembly

0x0: 0x18 DC8 24; '.'

Region $$ Table $$ Base:

Region $$ Table $$ Limit:

__vector:

0x1: 0xf0 DC8 240; '.'

0x2: 0xe59f DC16 58783; '..'

0x4: 0xe59ff018 PC LDR, [PC, # 0x18]; Abort_Handler

0x8: 0xe59ff018 PC LDR, [PC, # 0x18]; Abort_Handler

0xc: 0xe59ff018 PC LDR, [PC, # 0x18]; Abort_Handler

 At address 0x0 appears:

0x0: 0x18 DC8 24; '.'

This does not seem like a "goto"...

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thieulam
Contributor III

Con Verse answered me saying:

ARM processors are different. Address 0x0 contains the initial value to load into the stack pointer (SP), and address 0x4 contains the initial value to put into the PC.

both at address 0 and at address 4 I have 0xe59ff018.

but the PC go at address 0x8d4 after esecution of address 0x0..

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thieulam
Contributor III

Converse tells right for kinetis.!

For lpc is different ( i hope).

Is The jump address at 0x0020?

Lpc2468

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converse
Senior Contributor V

With ARM (as opposed to Cortex-M) processors, at Reset, the processor fetches the *instruction* from address 0x0. This is typical a branch instruction, such as 

B _start

This is then followed by the rest of the vector table.

If you use LPCXpresso as your IDE, (not MCUXpresso - which does not support LPC2000 parts), creating a project will provide a standard startup code for you.

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