lpc54114 Dual-core remote upgrade

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lpc54114 Dual-core remote upgrade

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Contributor I

Hello everyone

    I will first describe my problem. I am doing a remote upgrade of LPC54114. The way I use it is one, the Bootloader program, one APP program, and two programs to download Flash at different addresses.

   1) Check if the second part of the code needs to be updated.
   2) Go to 4) if no updates are needed.
   3) Perform an update operation.
   4) Jump to the second part of the code execution.

    In this way, I implemented an upgrade to the M4 core. But my changes to the startup file have affected the startup of the M0+ core. Since I need to jump, I  changed the file (one is the original file, one is changed by me, I have the label in the annex), the main change is

 

__Vectors       DCD     |Image$$ARM_LIB_STACK$$ZI$$Limit| ; Top of Stack 

 

change to

 

 __Vectors       DCD     __initial_sp              ; Top of Stack

 

 

 Affect the variable to

 

 Extern uint32_t Image$$CORE1_REGION$$Base;

(My understanding of this variable is: the starting address of the M0 core program)

 

  Extern uint32_t Image$$CORE1_REGION$$Length;

(My understanding of this variable is: length of the M0 core program)

 

 The error after compiling is

debug\hello_world_cm4.out: Error: L6218E: Undefined symbol Image$$CORE1_REGION$$Base (referred from hello_world_core0.o).
debug\hello_world_cm4.out: Error: L6218E: Undefined symbol Image$$CORE1_REGION$$Length (referred from hello_world_core0.o).

 

  Can I solve this problem by making changes to the startup file or other methods? Or my upgrade ideas need to be changed?

     Does anyone have time to help me see it? Lpc54114 dual-core upgrade, I did not see someone doing it online, I have some problems. Thank you.

My mail:971443786@qq.com

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NXP TechSupport
NXP TechSupport

Hi wang zhipeng,

 

Are you relocating the vector table offset register by using SCB->VTOR before jumping to your application?

 

I recommend you to check the following post:

How to relocate interrupt vector table in MCUXpresso

 

Also please check the following application note in chapter 5.3.1 where explains in detail how to jump to user application.

https://www.nxp.com/docs/en/application-note/AN10866.zip

 

Hope it helps!

 

Best regards,

Felipe

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Contributor I

Hi Felipe

    First of all, thank you very much for your reply.Because of these days of vacation, I was not able to respond to you in time, I am sorry.

   I used the SCB-> VTOR relocation vector table offset register,I used the SCB->VTOR relocation vector table offset register, and I completed the upgrade of the lpc54114 M4 core.This is not the question I asked.Below I will talk about the problems I encountered and why I need to change the startup file.

   The compilation environment I am using is keil5. First, I need to first download the Bootloader program and the first version of the APP program. The two programs download Flash at different addresses. The Bootloader program is stored in 0X0~0X8000. The first version of the APP program is stored in 0X8000~0X20000. So I checked this option (as shown) to download the two programs to different addresses.

DR[%$9ZNM7ROCFZQ7WO@0Q6.png 

If you do not change the startup file, you will be prompted with the following error (as shown). So I changed the startup file to eliminate this error.

6A$GH[OL`T[M2}7]ECGB~]J.png

     

   The changed startup file can upgrade the M4 core, but it affects the startup of the M0 core. I have changed the startup file and its effects and errors, I said in the post. I hope to solve this problem, not a jump problem. I can upgrade the LPC1768 or LPC54114M4 core, but I can't upgrade the LPC54114 dual core.

Best regards,

wang zhipeng

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NXP TechSupport
NXP TechSupport

Hi wang zhipeng,

 

Have you tried upgrading M4 and M0 with different projects?

 

Please check following application note from Keil:

http://www.keil.com/appnotes/docs/apnt_318.asp

 

Regards,

Felipe

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36 Views
Contributor I

Hi Felipe

    First of all, thank you very much for your reply.

    The Cortex-M0+ runs in SRAM1 and the Cortex-M4 runs in Flash memory.I don't know how to use two different projects to upgrade.Keil's application notes can't help me.

    Do you know that someone has done a remote upgrade with LPC(LPC4300 or LPC54110) dual core?I can't find any information on the website and technical support in China, I can only find the upgrade to the single core about LPC.

Regards,

wang zhipeng

    

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NXP TechSupport
NXP TechSupport

Hi wang zhipeng,

 

Thanks for your reply. Unfortunately, we do not have information related to dual core upgrade.

Maybe the following link could help: https://www.design-reuse.com/articles/38128/method-for-booting-arm-based-multi-core-socs.html

 

Sorry for the inconvenience this may cause you.

 

Regards,

Felipe

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36 Views
Contributor I

Hi Felipe

It doesn't matter, thank you for your reply, thank you again.

Regards,

wang zhipeng

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36 Views
Contributor I

Can someone help me? Thank you.

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