Hi,
I'm using LPC11e68 system clock is set to 48MHz and SSP0 configured as SPI master @ 12MHz.
it seems like effective baud rate is much lower - DMA is not in used and from the analysis i made it seems like reads/writes to SSP0 DR registers stalls.
did anyone experience any similar performance issues with SPI?
i will appreciate any input.
If your SPI is set to 1/4 the CPU speed, you've only got 32 cycles for each byte. That's not much time for the CPU to do too much.