jtag problem

[lpcware]

Content originally posted in LPCWare by salamlora1 on Sun Dec 29 05:51:30 MST 2013
Hi
I have designed an pcb for lpc 812m101fdh16 and now i want to use an jtag for my project but my jtag not work correctly the VDD is 3.6
And
TDO are pileups with 10k ohm and connect to pin 16 of ic
TDI are pull-up with 10k ohm and connect to pin 9 of ic
TCK are pull-down with 10k ohm and connect to pin 5 of ic
RTCK are pull-down with 10k ohm
TMS are pull-up with 10k ohm and connect to pin 6 of ic
TRST are pull-up with 10k ohm and connect to pin 4 of ic
RESSET are connected to RESSET
but the jtag programmer not recognize my ic :( can anyone help me ?

[lpcware]

Content originally posted in LPCWare by embd02161991 on Thu Jan 30 14:05:27 MST 2014
Hi,

You can look at the following link for information on programming LPC800 using Flashmagic tool.

http://www.lpcware.com/lpc800-mini-kit

Thanks,
SK

[lpcware]

Content originally posted in LPCWare by salamlora1 on Sun Dec 29 07:12:02 MST 2013
oh nooooo  :((
thx for your help  :)
i most to program it whit flash magic any one know how to program whit that ?

[lpcware]

Content originally posted in LPCWare by CVAS on Sun Dec 29 06:51:59 MST 2013

---

Quote: salamlora1
datasheet says
8.23 Emulation and debugging
Debug functions are integrated into the ARM Cortex-M0+. Serial wire debug functions are
supported in addition to a standard JTAG boundary scan. The ARM Cortex-M0+ is
configured to support up to four breakpoints and two watch points.
The Micro Trace Buffer is implemented on the LPC81xM.
The RESET pin selects between the JTAG boundary scan (RESET = LOW) and the ARM
SWD debug (RESET = HIGH). The ARM SWD debug port is disabled while the LPC81xM
is in reset. The JTAG boundary scan pins are selected by hardware when the part is in
boundary scan mode on pins PIO0_0 to PIO0_3 (see Table 4).

page 29

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Hello salamlora1,

In LPC81XM datasheet , at page 29  ( before Fig 12. Connecting the SWD pins to a standard SWD connector )  appear a remark

"Remark: The JTAG interface cannot be used for debug purposes"

CVAS

[lpcware]

Content originally posted in LPCWare by salamlora1 on Sun Dec 29 06:22:06 MST 2013
datasheet says
8.23 Emulation and debugging
Debug functions are integrated into the ARM Cortex-M0+. Serial wire debug functions are
supported in addition to a standard JTAG boundary scan. The ARM Cortex-M0+ is
configured to support up to four breakpoints and two watch points.
The Micro Trace Buffer is implemented on the LPC81xM.
The RESET pin selects between the JTAG boundary scan (RESET = LOW) and the ARM
SWD debug (RESET = HIGH). The ARM SWD debug port is disabled while the LPC81xM
is in reset. The JTAG boundary scan pins are selected by hardware when the part is in
boundary scan mode on pins PIO0_0 to PIO0_3 (see Table 4).

page 29

[lpcware]

Content originally posted in LPCWare by TheFallGuy on Sun Dec 29 06:08:02 MST 2013
As far as I know, the lpc800 does not support tag. It is swd only.