how to trigger a receive terminal count interrupt request

[hill_yi]

Recently, I am using lpc3250 to receive UART and SSP DMA data.As a result, DMA has carried data to buffer, but it has not triggered the terminal count interrupt request. Strangely enough, sending data can trigger the terminal count interrupt request.I am doubt that if there are any registers I haven't configured well.Follows are part of my configuration code static void ssp1_dma_rcvd_config(void) { SSP_DRVDAT_T *spicfgptr = (SSP_DRVDAT_T *) sspdev2; /* DMA传输参数设置 */ ssprx1_dmact.pdmaregs->dma_chan[ssprx1_dmact.dmach].src_addr = (UNS_32)&(spicfgptr->regptr->data); ssprx1_dmact.pdmaregs->dma_chan[ssprx1_dmact.dmach].lli = 0; ssprx1_dmact.pdmaregs->dma_chan[ssprx1_dmact.dmach].dest_addr = (UNS_32)&rxbuff1; ssprx1_dmact.pdmaregs->dma_chan[ssprx1_dmact.dmach].control = (DMAC_CHAN_INT_TC_EN | DMAC_CHAN_DEST_AUTOINC | DMAC_CHAN_DEST_WIDTH_8 |DMAC_CHAN_SRC_WIDTH_8| DMAC_CHAN_DEST_BURST_1| DMAC_CHAN_SRC_BURST_1|DMAC_CHAN_TRANSFER_SIZE(5)); ssprx1_dmact.pdmaregs->sync |= DMA_PER_SSP1_RX; ssprx1_dmact.pdmaregs->sw_burst_req = DMA_PER_SSP1_RX; /* DMA配置并开启传输 */ ssprx1_dmact.pdmaregs->dma_chan[ssprx1_dmact.dmach].config_ch = (DMAC_CHAN_IE | DMAC_CHAN_FLOW_D_P2M | DMAC_CHAN_ITC | DMAC_SRC_PERIP(DMA_PERID_SSP1_RX) | DMAC_CHAN_ENABLE); spicfgptr->regptr->dmacr |= SSP_DMA_RXDMAEN; }

[ywzhu]

I have the same problem. I set the Uart2 as the source peripheral and SDRAM as the destination. In the meantime, use uart2 as the flow controller. According to what has been specified in the manual of lpc3250, if using a peripheral as the transfer flow controller, the TC interrupt will be triggered when a DMA request is sent. Also, the manual says that UART receive DMA request is sent if the amount of received bytes in the FIFO exceeds the receive FIFO trigger level. Everything seems very clear according to the manual, but in practice it cannot work. So what has to be pay attention to when I try to use a DMA to transfer data frames received of which the length is unknown in prior via UART2, and want to be informed when the transfer is done?

[Alice_Yang]

Hello hill_yi,

Does it complete DMA transfer when in UART receive processing?

Check the register TransferSize of DMA channel control registers .

[hill_yi]

Thanks for your answer. For I have already set TransferSize of DMA channel control registers. And it works well when I use dma to send data by ssp or uart(send data correctly and trigger the complete terminal count interrupt) . But when I use ssp or uart to receive data, it  can receive data correctly(the data in buffer is right) but can not trigger the  complete terminal count interrupt. As the configuration is similar，I wonder if there is something different  between sending and reception?