emWin demo is too slow!

[lpcware]

Content originally posted in LPCWare by giusloq on Fri Jan 09 05:04:38 MST 2015
I was able to run a minimal GUIDEMO from emWin on my MBC4350 development board from Keil.

I started from emwin_hello_world project in lpcopen_2_12_lpcxpresso_keil_mcb_4357.zip. It is very slow, even for drawing texts! Take a look at this video.

Any suggestions?

[lpcware]

Content originally posted in LPCWare by giusloq on Mon Feb 09 10:13:44 MST 2015

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What is the speed of SPIFI interface??

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I checked with oscilloscope and the clock is 40.8MHz (204 / 5). I increase the SPIFI clock frequency to 68MHz (204 / 3), but the perfomance is similar.

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Quote:
Are you using S25FL032 QSPI flash

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I'm using MCB4350 from Keil. It's mounted a S25FL032P1...

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Quote:
Are you using SPIFI library?

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No, I'm booting directly from Quad-SPI and I don't touch SPIFI peripheral. I started from the project emwin_hello_world in lpcopen_2_12_lpcxpresso_keil_mcb_4357.zip.
Only the SPIFI clock is changed in Board_SetupClocking() in board_sysinit.c.

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Can you also try to relocate the functions which are called most of the time?

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What do you mean with relocate? Are you meaning move in internal SRAM and execute from there? I think I have to copy the code from external QSPI in internal SRAM, but I don't know how to do this. Have you any document or application note?

[lpcware]

Content originally posted in LPCWare by mc on Mon Feb 09 09:22:40 MST 2015
Hi giusloq,
What is the speed of SPIFI interface? Are you using S25FL032 QSPI flash?
Are you using SPIFI library?
Can you also try to relocate the functions which are called most of the time?

[lpcware]

Content originally posted in LPCWare by giusloq on Mon Feb 09 01:50:24 MST 2015
I have a doubt. Now I'm running code (and booting) from external Quad-SPI on LPC4350. Could be the SPIFI the bottleneck, so the cause of poor performance?

[lpcware]

Content originally posted in LPCWare by giusloq on Thu Feb 05 09:07:40 MST 2015
Another video.

How is it possible that drawing process is so slow? It seems the performance of a low-end microcontroller that drives the TFT through SPI interface!

[lpcware]

Content originally posted in LPCWare by giusloq on Wed Jan 28 06:19:24 MST 2015

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Quote: mc
Hi giusloq,
To achieve best speed setting for SDRAM you used, I recommend you to read EMC chapter in LPC43xx UM (http://www.nxp.com/documents/user_manual/UM10503.pdf).
You can tune SDRAM parameters in initDynMem(...) function ( See function in LPC18xx_43xx.c)

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The BSP I'm using already has a correct SDRAM configuration (at least, I think):

/* Keil SDRAM timing and chip Config */
STATIC const IP_EMC_DYN_CONFIG_T MT48LC4M32_config = {
EMC_NANOSECOND(64000000 / 4096),/* Row refresh time */
0x01,/* Command Delayed */
EMC_NANOSECOND(18),
EMC_NANOSECOND(42),
EMC_NANOSECOND(70),
EMC_CLOCK(0x01),
EMC_CLOCK(0x05),
EMC_NANOSECOND(12),
EMC_NANOSECOND(60),
EMC_NANOSECOND(60),
EMC_NANOSECOND(70),
EMC_NANOSECOND(12),
EMC_CLOCK(0x02),
{
{
EMC_ADDRESS_DYCS0,/* Keil Board uses DYCS0 for SDRAM */
3,/* RAS */

EMC_DYN_MODE_WBMODE_PROGRAMMED |
EMC_DYN_MODE_OPMODE_STANDARD |
EMC_DYN_MODE_CAS_3 |
EMC_DYN_MODE_BURST_TYPE_SEQUENTIAL |
EMC_DYN_MODE_BURST_LEN_4,

EMC_DYN_CONFIG_DATA_BUS_32 |
EMC_DYN_CONFIG_LPSDRAM |
EMC_DYN_CONFIG_4Mx32_4BANKS_12ROWS_8COLS |
EMC_DYN_CONFIG_MD_SDRAM
},
{0, 0, 0, 0},
{0, 0, 0, 0},
{0, 0, 0, 0}
}
};

In board_sysinit.c I have:

Chip_EMC_Dynamic_Init((IP_EMC_DYN_CONFIG_T *) &MT48LC4M32_config);

What should I change to boost performance?

[lpcware]

Content originally posted in LPCWare by mc on Fri Jan 16 18:39:00 MST 2015
Hi giusloq,
To achieve best speed setting for SDRAM you used, I recommend you to read EMC chapter in LPC43xx UM (http://www.nxp.com/documents/user_manual/UM10503.pdf).
You can tune SDRAM parameters in initDynMem(...) function ( See function in LPC18xx_43xx.c)

[lpcware]

Content originally posted in LPCWare by giusloq on Mon Jan 12 02:35:58 MST 2015
I'm sorry, but I'm a newbie with external memories and SDRAM and LPC43xx microprocessor family.

I understood the microprocessor mounted on Keil MCB4350 dev board is running at the maximum frequency of 204MHz.

The EMC can run at the same frequency of main processor (in my case, 204MHz) or at a half speed (in my case, 102MHz). I can't use 204MHz because it's too high for my SDRAM (it's a Micron MT48LC4M32B2-6 part, 167MHz speed grade). So I need to configure the clock of EMC for 102MHz. The following is the code I'm using:

/* Setup external memories */
void Board_SetupExtMemory(void)
{
/* Setup EMC Delays */
/* Move all clock delays together */
LPC_SCU->EMCDELAYCLK = ((CLK0_DELAY) | (CLK0_DELAY << 4) | (CLK0_DELAY << 8) | (CLK0_DELAY << 12));

/* Setup EMC Clock Divider for divide by 2 - this is done in both the CCU (clocking)
   and CREG. For frequencies over 120MHz, a divider of 2 must be used. For frequencies
   less than 120MHz, a divider of 1 or 2 is ok. */
Chip_Clock_EnableOpts(CLK_MX_EMC_DIV, true, true, 2);
LPC_CREG->CREG6 |= (1 << 16);

/* Enable EMC clock */
Chip_Clock_Enable(CLK_MX_EMC);

/* Init EMC Controller -Enable-LE mode */
Chip_EMC_Init(1, 0, 0);
/* Init EMC Dynamic Controller */
Chip_EMC_Dynamic_Init((IP_EMC_DYN_CONFIG_T *) &MT48LC4M32_config);
/* Init EMC Static Controller CS0 */
Chip_EMC_Static_Init((IP_EMC_STATIC_CONFIG_T *) &S29GL64N90_config);

/* Enable Buffer for External Flash */
LPC_EMC->STATICCONFIG0 |= 1 << 19;
}

So I think it is correctly configured. Anyway I tried with a scope on clock pin of SDRAM and I see "bursts" of about 100MHz.

[lpcware]

Content originally posted in LPCWare by mc on Sat Jan 10 07:31:14 MST 2015
Hi giusloq,
Can you please check if EMC is running at highest clock frequency?