Write to external flash when running from external flash using SPIFI

[lpcware]

Content originally posted in LPCWare by gvandenbosch on Wed Mar 09 01:32:17 MST 2016
Hello,

I am running my image from external flash using SPIFI.
Now I want to write some files to the external flash as well.

When my image still ran from internal flash I did this the following way:

spifiDevSetMemMode(spifi_handle,0);
spifiDevUnlockDevice(spifi_handle);
//write to the device
spifiDevLockDevice(spifi_handle);
spifiDevSetMemMode(spifi_handle,1);

But now my application will crash when I do this because it is running in external flash using SPIFI as well.

Is there any way to accomplish to write to external flash while also running from it using SPIFI?

Cheers,
Gerard

[cheuschkel]

Hey Girard,

I posted my implementation source that I used to solve your same problem.  Check it out here:

https://community.nxp.com/message/828579 

[lpcware]

bump

[lpcware]

Content originally posted in LPCWare by gvandenbosch on Wed Mar 09 05:24:00 MST 2016
Hello,

Thank you for the clear explanation.
I am going to try it this way.

Cheers,
Gerard

[lpcware]

Content originally posted in LPCWare by bavarian on Wed Mar 09 04:19:36 MST 2016
Hello Gerard,

simply put the part of the program which is doing the erase/program activity to the internal SRAM, then it will work the same way as from internal flash.
However, even if I used the word "simply", there are some things to consider:
[list]
  [*]  depending on where you get the data from, take care that sub-functions for UART, I2S driver etc also need to run from SRAM at the time you are busy on the SPIFI. If you can work in batching mode (get data in - program it - get next data - etc) then this is not mandatory.
  [*]  Take care that the interrupt vectors are normally located in the SPIFI. So if you need to serve interrupts during erase/program cycles, then the interrupt vector table and the respective ISRs must be in SRAM. If you relocate it at runtime or put it statically into SRAM is up to you.
[/list]

Regards,
NXP Support Team