Content originally posted in LPCWare by jdowd on Wed Aug 27 11:03:54 MST 2014
Thanks for your reply.
I have looked it over, compiled it and made sure it worked. Unfortunately my application needs to run as a slave and not a master. I'm trying to figure out how much clock information is still required to setup the rx/tx side. I can't quite figure out the requirements reading the User Manual.
And...
Why does the STATE register always show 0x07 as it's value? You can't seem to clear it, if the "level" of the RX FIFO is 0, then how can there be an Rx IRQ pending? I've set the RX Fifo level to 4.
Cheers!!
Oops!!
At the time of this posting I was pursuing the I2S interface as well. I must have been thinking about it when I wrote this reply. Sorry for the confusion.
Cheers!!