Using the LPC54114 SPI API

[jameswhitney]

Had a question about the LPC54114 SPI API.

I've been banging my head against the wall for close to two days on something that should seemingly be working. I am trying to read the UID code from a Microchip EEPROM, PN 25AA02UID. It is necessary to provide information on the operation, the address to access, then, read the designated number of bytes.

I used the 'lpcxpresso54114_i2c_polling_b2b_transfer_master' as a template. As a check I ran the original project to check signal generation per a suggestion from Kerry Zhou to a previous inquiry. KZ signals:

My results

As no slave is attached MISO (blue trace) is not defined.

Next, I changed the buffer size of srcBuff to '2', destBuff to '4', and connected up the EEPROM. srcBuff[0] = 0x03 and srcBuff[1] = 0xFC. Re-running the program the output is:

While the MOSI pulse (purple trace) looks like a single value I tested with other values other than 0xFC and the address byte and read byte were clearly discernible so I think the trace just looks like a single value due to values 'F' and 'C' being very close. When 'SPI_MasterTransferBlocking' returned all of the values in 'destBuff' were zero, additionally, the MISO signal (Green trace) never showed any indication that data was being clocked out of the EEPROM even though it is clear to see that CS (yellow trace) and SCK (blue trace) are both active.

Anybody have any ideas ?

Jim

[Alice_Yang]

Hello James Whitney,

If you think Master has send right data to slave(PN 25AA02UID),

while no data received, I think you need check datasheet of PN 25AA02UID,

whether the command master send is right, also the process of read UID and command format.

And from your picture , I can't read the MOSI is 0x03 and 0xfc.

There also is a SDK demo about write and read from external flash through SPI:

"lpcxpresso54114_spi_polling_flash", while it not use "PN 25AA02UID", so the command is not the same.

BR

Alice

[jameswhitney]

Hello, Alice,

Again, the top plot is one generated by Mr. Kerry Zhou of NXP with the suggestion - to another Community member - to try to replicate the same MOSI pattern for the *original* SPI B2B polling master. As can be seen in the second plot, my MOSI signal replicates this *exactly* (Kerry's last two pulses have run off the screen). So I am confident my MOSI signal for the B2B example is working.

The datasheet for the 25AA02 has already been checked....many times. Unless I am interpreting something incorrectly the MOSI signal for my actual application is correct, i.e., the '0' will not appear. For '3' the last two bits will be high, followed by 4 bits high for 'F', followed by the next two bits high for 'C' (12), i.e., we will just see basically a 'step' waveform that is high - i.e., all '1's - for 8 clock cycles which is exactly what the bottom plot illustrates. So, the correct operation is sent (read), 0x03, followed by the correct address, 0xFC; what should immediately follow on the MISO line is the data, which is what I am not seeing.

Regards,

Jim

[Alice_Yang]

Hello James,

1)It needs two times SPI transfers to read UID or some other data from SPI slave, first one for Send Read command and address from Master to Slave,  second time we can get the data from Slave.

And your project is Board to Memory , the demo of "lpcxpresso54114_spi_polling_flash" is just B2M,

so kindly recommend you  refer to it . In the read function of this demo , you can find there are two times transfers:

the callback is function of " flash_transfer_cb()", about detail you can have a look at demo code.

2） I test the read function on LPCxpresso54114 board, the SPI (external flash) not the same with yours , while the

theory is same,  below is my result, I read the address 0x0000, 4 bytes, the data is 1, 2, 3, 4(ASCII : 0x31,0x32,0x33,0x34 )

Have a great day,
TIC

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[jameswhitney]

Alice,

Thank you for your efforts.

Mr. Kerry Zhou pointed out to me today that jumper JP6 must be installed for port J4 (Pmod port) to work correctly in SPI mode.

However, what I particularly learned from your response and the SPI flash example was the necessity to send 'opcode' and address in one SPI transaction, *THEN* doing SPI read in another transaction.

Many thanks,

Jim Whitney

[Alice_Yang]

Hello James,

OK, welcome!

Have a great day,
TIC

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- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
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