Using External SPI RAM as RAM1

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Using External SPI RAM as RAM1

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by jeffbelz on Fri Apr 05 20:25:50 MST 2013

I want to configure the Keil uVision to use an external SPI RAM chip as read write memory.  So in other words, use SPI external RAM as my HEAP.


This chip does not have an EMC on it, so the communication would have to be SPI or parrallel.  I prefer SPI.  Yes, I understand it will be slow, but I can afford it to be slow.


Please, I need help on this very bad.  Any help would be very appreciated.

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lpcware
NXP Employee
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Content originally posted in LPCWare by Dave on Tue Apr 23 08:41:34 MST 2013

Thanks Wouter!  As always, you have the answers...  I wouldn't have guessed this from the description...


Guess that answers this thread, guys...  Best of luck.

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Wouter on Tue Apr 23 01:01:00 MST 2013

Hi,


 


Our current parts can only interface to Flash memory over SPIFI, SPIFI RAM memory is not supported.


 


Regards,


Wouter

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Dave on Mon Apr 22 08:56:49 MST 2013

I have not done this, so I cannot confirm or deny it's possibility.


I have focused my efforts on the LPC1788, which does not have the SPIFI interface built into it.


I only noticed in the user's manual the description for SPIFI, and it's availability on the 1773 processor, and by the sound of the description, it would be quite capable of accomplishing memory mapped access for a device over the SPI bus...


Anybody out there actually done this?

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lpcware
NXP Employee
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Content originally posted in LPCWare by wmues on Mon Apr 22 04:54:22 MST 2013

I doubt that it is possible to use SPI RAM on the LPC1773.


It might be possible to programm the MPU to throw an exception for each read and write access to a specific address range, and to do the read/write access inside the exception handler. But:


a) it will be slow


b) the exception handler will have to analyse the opcodes to determine the exact address of the access.


These things have been done in the past, but the low performance/code ratio is evident.

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lpcware
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Content originally posted in LPCWare by Wouter on Fri Apr 19 01:31:18 MST 2013

Hi Dave,


 


I'm sorry, you are right indeed. The LPC1773 is one of the newer LPC17xx devices, which indeed does have the SPIFI interface, enabling memory mapped SPI flash memory.


 


Regards,


Wouter

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lpcware
NXP Employee
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Content originally posted in LPCWare by Dave on Tue Apr 16 12:04:50 MST 2013

Actually, I believe the <strong>LPC1773</strong> can do this using the SPIFI interface...

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Wouter on Mon Apr 08 00:22:05 MST 2013

Hi,


In order for Keil to use external memory automatically, you would need to have the memory to be mapped in the LPC17xx memory space. The LPC17xx can't do this with SPI memory.


The only way you can make use of the SPI RAM, is by writing your own drivers which can copy memory to/from internal SRAM, but keil will not be able to automatically make use of this additional memory.


Regards,


Wouter

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