Use M3MEMMAP register

lpcware · ‎06-15-2016

Content originally posted in LPCWare by FlorentCapelle on Sat Nov 24 10:06:55 MST 2012
Hi all,

I am implementing a simple bootloader on a LPC1857.
My bootloader code is in the internal flash bank A at 0x1A000000.
My application code is in the internal flash bank A at 0x1A00C000.
In my bootloader, what should the sequence be (using M3MEMMAP register) to jump to my application code?

Thanks for any tip!
Florent

lpcware · ‎06-15-2016

Content originally posted in LPCWare by uratan on Tue Dec 11 19:57:02 MST 2012
I have found new information about the MEMMAP function in
"Technical note TN00006 - LPC1800 and LPC4300 MxMEMMAP memory map"
<PRE>
***************************
** Thank you very much ! **
***************************
</PRE>
(but...)

- * - * -

I will write a little more my hope about NXP's resource managemant.
<OL>
<LI>
The All-in-one document package "LPC1830FET100.zip"
(which I'm downloading from http://www.nxp.com/products/microcontrollers/..., I believe this site is the master, above TN00006.pdf is in this)
shall have release date in its filename.
<BLOCKQUOTE>
REASON: I can aware the renewal easyly by it.

The CMSIS package "lpc18xx-2012-12-11.zip" and
Open platform package "LPCOpen_platform_v0.51.zip"
(I download both from LPCware.com)
have release date or version number. Why the documents not ?
</BLOCKQUOTE>
</LI>
<LI>
Please leave old version of documents/resources on the web.

<BLOCKQUOTE>
REASON: I will keep my base packages about my development,
so I can see my modification anytime by comparing my code
and based one.

But if I get some outcome which is done by others for reference,
I may not have the packages which he was based on.
I can not extract so easyly the modifications which is done by him.

Also, I can trace the version up history anytime I want.

(And I can detect I was wrong or
the document was wrong ,
in the future, to make correct feedback to me)
</BLOCKQUOTE>
</LI>
</OL>

I can not concentrate my mind for my development because

I must watch the web for the update day by day... &nbsp ;-)

&nbsp (Wed Dec 12 11:53:53 JST 2012)

lpcware · ‎06-15-2016

Content originally posted in LPCWare by uratan on Thu Nov 29 20:32:00 MST 2012
But I want to know more about M3MEMMAP...

- * - * -

I'm trying LPC1830-Xplorer (rev.A), have started to read UM10430 (Rev.2).
And started to try to port "LPC1830_Xplorer_PeripheralTest" program
(in lpc1830_Xplorer_Keil.zip) for my gcc environment.

Now, about M3MEMMAP, my thought below is correct ?
(see Fig.7 in Chap.2, UM10430)
<OL><LI>
I can not read/write AHB SRAMs(0x2000_0000) thru shadow

window(0x0000_0000) by setting M3MEMMAP = 0x2000_0000.

Devices which real-address is out of code space (0x0000_0000--0x1FFF_FFFF)

can not be remapped by M3MEMMAP.

Or simply because, in Fig.7, AHB SRAMs do not have connections on

I-code/D-code bus in AHB multilayer matrix.

(FYI: I can run program from AHB SRAM(0x2000_0000).)

(FYI: I can write to local SRAMs(0x1000_0000) thru shadow window.)

</LI><LI>
I linked above my PeripheralTest program on 0x0000_0000 to run

thru shadow window. But with this setting, I could not send

correct USB descriptors which is in const section.

After dark 2 days, I can fix this by making DTD to point

real-device-addresses. (USB_ProgDTD() in usbhw.c)
<PRE>
   if(ptrBuff < 0x10000000) {
      ptrBuff += LPC_CREG->M3MEMMAP;
   }</PRE>
About USB_DMA, this is correct because there is no conversion

unit between USB unit and memory.
</LI></OL>

In total, address conversion unit of M3MEMMAP is just beside of

Cortex-M3, near I-code/D-code bus... ?

It seems that M3MEMMAP function is belong to NXP, not M3-core,

so I want NXP to announce a little more info about M3MEMMAP...please.

- * - * -

I can now connect to virtual com port both from SPIFI-boot and

uart-boot by same binary. You can see it at test-peri/*, in minimon-012.zip,

from < http://www002.upp.so-net.ne.jp/uratan/xplr/endex.html#mFmore2 >

- * - * -

( Manual is all, for me...)

* about Fig.1, Fig.2, Fig.7, Fig.8,

    both word "DMA" and "GPDMA" are used, confused...

    footnote comment marking "(1)" is used but not described...

* end address in title of Table.189, 190 must be wrong...

* description for 'WS' is missing in Table 383. (used in Table 417, 422)

* in Table 409/410, using "bit 3" for EPTN/EPTNE may be ambiguous,

calling them like table 417 is welcome.

lpcware · ‎06-15-2016

Content originally posted in LPCWare by starblue on Mon Nov 26 05:27:02 MST 2012
> [...] I did not even know about the VTOR register.

It is described in the user manual for the core,
DUI0552A "Cortex-M3 Devices Generic User Guide" from ARM.
http://infocenter.arm.com/help/topic/com.arm.doc.dui0552a/DUI0552A_cortex_m3_dgug.pdf

Jürgen

lpcware · ‎06-15-2016

Content originally posted in LPCWare by DF9DQ on Sun Nov 25 01:30:05 MST 2012
Hi Florent,

While you could do that (link your application to 0x0000C000, set M3MEMMAP=0x1A000000), there is nothing you can gain from it. It only adds an extra level of indirection.

Access speed, and the availability of debug resources are the same for both addresses. My suggestion is to link to the physical address, and ignore M3MEMMAP...

Regards,
Rolf

lpcware · ‎06-15-2016

Content originally posted in LPCWare by FlorentCapelle on Sat Nov 24 12:37:08 MST 2012
Hi Rolf,

Thank you for this useful reply as I did not even know about the VTOR register. Now I know :-)

Is the procedure the same if my application is actually linked to address 0x00000000 but placed at address 0x1A00C000?

Best regards,
Florent

lpcware · ‎06-15-2016

Content originally posted in LPCWare by DF9DQ on Sat Nov 24 12:26:26 MST 2012
Hi Florent,

Your application is linked to address 0x1A00C000, and has its own exception vector table at that address.

The necessary steps are:
- Load the main stack pointer with the content of the first word of the application vector table.
- Set VTOR to 0x1A00C000.
- Jump to the address indicated by the second word of the application vector table.

M3MEMMAP is not involved at all.

Loading VTOR in the boot loader is optional. It can also be done by the application itself.

Regards,
Rolf