Trouble with MCAN_Reset()

[cmullen]

I am trying to initialize CAN0 on my LPC56416. 
I am using functions from the fsl_mcan.c file that came with SDK_2.7.0_LPC54616J512.zip

I have this code.

---------------------------------
#include "LPC54616.h"
#include "fsl_mcan.h"

#define CAN_BAUD 500000 

mcan_config_t *CAN0_config;

MCAN_GetDefaultConfig(CAN0_config);
MCAN_Init(CAN0, CAN0_config, CAN_BAUD);
---------------------------------

When MCAN_Init() calls MCAN_Reset(),
the INIT bit in CCCR never gets set and the program stays in the while loop FOREVER.

---------------------------------
static void MCAN_Reset(CAN_Type *base)
{
 /* Set INIT bit. */
 base->CCCR |= CAN_CCCR_INIT_MASK;
 /* Confirm the value has been accepted. */
 while (0U == (base->CCCR & CAN_CCCR_INIT_MASK))
 {
 }

 /* Set CCE bit to have access to the protected configuration registers,
 and clear some status registers. */
 base->CCCR |= CAN_CCCR_CCE_MASK;
}
---------------------------------

I tried adding an assignment within the while loop but this did not seem to help.

---------------------------------
 while (0U == (base->CCCR & CAN_CCCR_INIT_MASK))
 { 
  base->CCCR |= CAN_CCCR_INIT_MASK; 
 }
---------------------------------

What am I doing wrong?ヽ(°〇°)ﾉ

[xiangjun_rong]

Hi,

Anyway, I think your following code is incorrect.

 while (0U == (base->CCCR & CAN_CCCR_INIT_MASK))
 { 
  base->CCCR |= CAN_CCCR_INIT_MASK; 
 }

As you know that the base->CCCR is written multiple times for above code, it is NOT allowed. 



Anyway the following code is correct

static void MCAN_Reset(CAN_Type *base)
{
 /* Set INIT bit. */
 base->CCCR |= CAN_CCCR_INIT_MASK;
 /* Confirm the value has been accepted. */
 while (0U == (base->CCCR & CAN_CCCR_INIT_MASK))
 {
 }

 /* Set CCE bit to have access to the protected configuration registers,
 and clear some status registers. */
 base->CCCR |= CAN_CCCR_CCE_MASK;
}
Do you mean that the processor sticks to the  while (0U == (base->CCCR & CAN_CCCR_INIT_MASK)) when you call the
 MCAN_Reset()? 
I suppose that the CAN example code in SDK package has not any issue.

BR
XiangJun Rong

[cmullen]

Anyway, I think your following code is incorrect.
 while (0U == (base->CCCR & CAN_CCCR_INIT_MASK))
 {
base->CCCR |= CAN_CCCR_INIT_MASK; 
 }

As you know that the base->CCCR is written multiple times for above code, it is NOT allowed. 

I concede that this code may be incorrect, however the program still gets hung up when the while loop is empty (as it 
was in the original code)

Do you mean that the processor sticks to the  while (0U == (base->CCCR & CAN_CCCR_INIT_MASK)) when you call the
 MCAN_Reset()? 

That is correct, the processor sticks to this loop indefinitely. When I look at the CCCR register with my debugger, the INIT bit is never being set. Is there something that could be preventing the register from being set?

[xiangjun_rong]

Hi,

executing the following code MCAN_Init(), pls check if the CAN gated clock is enabled by checking the AHBCLKCTRL1.

BR

XiangJun Rong

void MCAN_Init(CAN_Type *base, const mcan_config_t *config, uint32_t sourceClock_Hz)
{
#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
    /* Enable MCAN clock. */
    CLOCK_EnableClock(s_mcanClock[MCAN_GetInstance(base)]);
#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */

#if !(defined(FSL_FEATURE_MCAN_HAS_NO_RESET) && FSL_FEATURE_MCAN_HAS_NO_RESET)
    /* Reset the MCAN module */
    RESET_PeripheralReset(s_mcanResets[MCAN_GetInstance(base)]);
#endif

    MCAN_Reset(base);

    if (config->enableLoopBackInt)
    {
        base->CCCR |= CAN_CCCR_TEST_MASK | CAN_CCCR_MON_MASK;
        base->TEST |= CAN_TEST_LBCK_MASK;
    }
    if (config->enableLoopBackExt)
    {
        base->CCCR |= CAN_CCCR_TEST_MASK;
        base->TEST |= CAN_TEST_LBCK_MASK;
    }
    if (config->enableBusMon)
    {
        base->CCCR |= CAN_CCCR_MON_MASK;
    }
#if (defined(FSL_FEATURE_CAN_SUPPORT_CANFD) && FSL_FEATURE_CAN_SUPPORT_CANFD)
    if (config->enableCanfdNormal)
    {
        base->CCCR |= CAN_CCCR_FDOE_MASK;
    }
    if (config->enableCanfdSwitch)
    {
        base->CCCR |= CAN_CCCR_FDOE_MASK | CAN_CCCR_BRSE_MASK;
    }
#endif

    /* Set baud rate of arbitration and data phase. */
    MCAN_SetBaudRate(base, sourceClock_Hz, config->baudRateA, config->timingConfig);
#if (defined(FSL_FEATURE_CAN_SUPPORT_CANFD) && FSL_FEATURE_CAN_SUPPORT_CANFD)
    MCAN_SetBaudRateFD(base, sourceClock_Hz, config->baudRateD, config->timingConfig);
#endif
}