TFT LCD Video Compare Interrupt is NOT working properly

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TFT LCD Video Compare Interrupt is NOT working properly

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by emulund on Wed Dec 04 17:33:43 MST 2013
Hello All,

I Have my own custom build LPC1788 board.
i am able to make my TFT LCD 320x240 work with external SDRAM.
Everything works fine as expected.

But for some reason i need to use LCD's Vertical compare interrupt.
When i enabled it and if i use my IAR debugger to set break point on the ISR then it triggers the ISR.
But if i run without break point then it some time triggers for only once or twice but never again.
still My TFT LCD is displaying a steady nice picture without any problem.
my LCD's Horizontal,vertical sync & LCD DOT Clock  could be observerd on oscilloscope at the correct frequency and are very stable.
i am running the lpc1788 at 96Mhz.


My code to enable the vertical compare interrupt

volatile __no_init __READ_WRITE unsigned long ISER1 @ 0xE000E104;

   LCD_INTMSK = (1 << 3); //Enable Vertical compare interrupt
   ISER1 |= (1 << 5);   //Enable LCD Controller's Interrupt
//Enable LCD Controller
   LCD_CTRL = (6 << 1) | (1 << 5) | (1 << 11);
   LCD_CTRL |= (1 << 0); //Enable LCD Signals

My ISR

void LCD_IRQHandler(void)   <------- execute only once or twice not any further
{
   static unsigned int msk = 0;
      
   if (LCD_INTSTAT & (1 << 3)) //if vertical sync interrupt
   {
      LCD_INTCLR = 0xf;
      if(!msk)
      {
         msk = 1;
         FIO5PIN |= KEY_ROW_MASK; //Just toggle the pin to observe the ISR's execution on oscilloscope
      }
      else
      {
         msk = 0;
         FIO5PIN &= ~KEY_ROW_MASK;//Just toggle the pin to observe the ISR's execution on oscilloscope
      }
   }
   else
   {
      LCD_INTCLR = 0xf;
   }
}


Please help me solve this problem.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by mc on Thu Dec 05 18:35:29 MST 2013
Hi emulund,
I briefly looked into your code and was unable to catch any problem.
You can also look into the example at below link which uses LCD interrupt for multiple buffering on EA LPC1788 board.
http://www.lpcware.com/content/nxpfile/an11328-implementing-emwin%E2%80%99s-multiple-buffering-featu...

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by emulund on Thu Dec 05 06:20:30 MST 2013
Thanks for the reply

Even  LCD's Next Base Address Update (INTSTAT & 0x04). is also misbehaving for me.
Should i do something inside the ISR ?
The interrupt is NOT repeating...
I used the above same ISR just changed LCD_INTMSK to this

<code>
LCD_INTMSK = (1 << 2);
</code>

Thanks in advance
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by Pacman on Thu Dec 05 04:00:45 MST 2013
Please wrap you code snippet in [color=#060][[/color][color=#060]code][/color] ... [color=#060][[/color][color=#060]/code][/color] tags, so it becomes readable.

To do that, click the "Edit" tab at the top of your post.

Example:
[color=#060][[/color][color=#060]code][/color]int32_t myVar = 1;[color=#060][[/color][color=#060]/code][/color]
...results in...

int32_t myVar = 1; 


If you do that, II will have a look at your post and see if I can find an answer.
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by wmues on Thu Dec 05 03:20:43 MST 2013
I have not used the vertical sync interrupt.

I have used the lcd next base address update (INTSTAT & 0x04). This is working.
I do not know why you need the vertical sync interrupt - maybe you can use the address update interrupt?

regards
Wolfgang
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