SystemCoreClock does not compute.

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SystemCoreClock does not compute.

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by riscy00 on Mon Jan 06 00:08:34 MST 2014
Hi

I could not get equation working correctly, I have XTAL = 8MHz and Target SystemCoreClock is 100Mhz (or close to this)

After complies and run, the SystemCoreClock provide 100.480Mhz which is okay for this application, but when I check with equation in UM10360...

#define PLL0CFG_Val           0x0004009C// This provide 100,480,000 Hz according to SystemCoreClock
#define CCLKCFG_Val           0x00000004// Divide Value for CPU Clock from PLL0 FCCO/4 = 100.48MHz as required.
N +1= 5 and
M+1 = 9D = 157
CCLKCFG=4 (post PPL divided = 4)
FIN = (Fcco*N)/2*M)
100.480MHz * 4 = 401.92Mhz = Fcco, then Fin = (401.92Mhz * 5) /  (2 * 157) = 6.4MHz…..could not compute to 8Mhz!!.

Have I missed something?








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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by riscy00 on Tue Jan 07 13:38:04 MST 2014
I better get Darth Vader a P45 then, he the one giving me dark side of advice!
Thanks!
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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by R2D2 on Mon Jan 06 09:32:22 MST 2014

Quote: riscy00
Have I missed something?



Yes  :)


Quote: riscy00
#define CCLKCFG_Val           0x00000004// Divide Value for CPU Clock from PLL0 FCCO/4 = 100.48MHz as required.
[color=#f00]CCLKCFG=4 (post PPL divided = 4)[/color]



If CCLKCFG_Val is 4, CCLKCFG is (CCLKCFG_Val +1) = 5 ...

Now you get the right results:

FCCO = (2 × M × FIN) / N = 502,4 MHz

CPU CLOCK = 502,4 MHz / 5 = 100,48 MHz 
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