Content originally posted in LPCWare by khfreiberg on Thu Jul 17 15:51:56 MST 2014
Hi,
I have a LPC4337 with a FPGA connected to static CS1 for 16 bit wide memory mapped hardware access. I have an external analyzer connected to see what the controller is doing.
What I see on the bus doesn't correspond to the code. Even when I single step through the code I see 8 write cycles on consequtive addresses for a single 32 bit write in the code.
It looks like paging, but the PM bit in STATICCONFIG1 is set to 'OFF'. I am writing 0x81 to the register and enable the buffer that's it. Reading back 0x40005220 show 0x00080081 as expected.
Can anybody tell me which other register is controlling this?
