Some basics about LPC1769

[lpcware]

Content originally posted in LPCWare by anhdung88 on Mon Jul 28 07:50:34 MST 2014
Hi, could anyone tell me some basics about LPC1769:
1.Why the interupt controller of LPC1769/ARM M3 called Nested Vectored Interrupt Controller? What does the term "Vectored" and "Nested Vectored" mean?
2.Why the interupt timer of LPC1769/ARM M3 called Repetitive Interrupt Timer? What does the term "Repetitive" mean?

[lpcware]

Content originally posted in LPCWare by nerd herd on Tue Jul 29 10:56:00 MST 2014
Hello,

1. A nested Vectored Interrupt Controller has two properties, the interrupts are nested, and the interrupt controller is vectored. A nested interrupt means that interrupts can be enabled to interrupt each other (with priority to avoid a deadlock of interrupts). A vectored interrupt controller means that each device is given a unique ID so when they interrupt, the controller knows exactly where the interrupt came from and where to direct the CPU, as opposed to polling each device to find who interrupted. More information about the subject of interrupts can be found here:

http://www.electronics.dit.ie/staff/tscarff/6800/Interrupts/interrupts.htm

2. A Repetitive Interrupt Timer is used when you want periodic interrupts at a certain interval. More information can be found here:

http://eagerlearning.org/microcontrollers/practice/repetitive-interrupt-timer-rit/