SPIFI Flash - Boot from reset problem.

[lpcware]

Content originally posted in LPCWare by NickAtKandevsys on Thu Feb 13 12:06:55 MST 2014
I'm using an LPC1830 part with a supported SPIFI flash chip.

I can download the code into SPIFI flash and run it under the JTAG debugger just fine. I can see the program counter is in the SPIFI flash address range and I can see the flash being accessed on a scope.

However, when I remove the jtag debugger and try and get the board to boot directly into the code it gets stuck in the boot loader (based on the program counter). I have the boot links set to boot from SPIFI and I am not forcing the Bootloader into ISP board.

I do see a brief burst of activity on the SPIFI flash and then it goes quiet. The code then seems to be stuck in a loop polling some flag in low memory 0x10080004 which it never gets out of.

Is there some "magic" needed to make this work? I presume the issue is with the boot loader as the code works fine if I use the JTAG debuggger to run the code directly, thereby skipping the boot loader. There is reference to an image header but it also says this is optional - I dont have one.

Any suggestions how to fix this or debug it further would be gratefully received as I'm currently dead in the water.

Thanks
Nick

[lpcware]

Content originally posted in LPCWare by NickAtKandevsys on Tue Feb 18 07:01:54 MST 2014

Ok, so it looks like the 0xfefefefe nonsense was an artefact of the debugger. It was probably doing byte reads from the pointer when displaying the structure instead of word reads. The register contents can be correctly read if done by the CPU in test code.

[lpcware]

Content originally posted in LPCWare by NickAtKandevsys on Mon Feb 17 05:26:36 MST 2014

Hi MC,
The information in the link looks promising. However, I hit a problem trying to examine the SPIFI flash controller registers. I wanted to see what values they had been set to by the boot loader.

I defined the structure below - it was missing from the board support package I have.

typedef struct {                            /*!< (@ 0x40003000) SPIFI Structure          */
  __IO uint32_t CTRL;                       /*!< (@ 0x40003000) Control register       */
  __IO uint32_t CMD;                        /*!< (@ 0x40003004) Command register */
  __IO uint32_t ADDR;                       /*!< (@ 0x40003008) Address register */
  __IO uint32_t IDATA;                      /*!< (@ 0x4000300C) Intermediate data register      */
  __IO uint32_t CLIMIT;                     /*!< (@ 0x40003010) cache limit register */
  __IO uint32_t DATA;                       /*!< (@ 0x40003014) data register */
  __IO uint32_t MCMD;                       /*!< (@ 0x40003018) memory command register */
  __IO uint32_t STAT;                       /*!< (@ 0x4000301C) status register */
} LPC_SPIFI_Type;

#define LPC_SPIFI_BASE              0x40003000
#define LPC_SPIFI                   ((LPC_SPIFI_Type            *) LPC_SPIFI_BASE)

volatile LPC_SPIFI_Type  *psSPIFI = LPC_SPIFI;

I then let my code boot from SPIFI flash and place a breakpoint at a point where psSPIFI is valid. However, when I try and dereference the pointer to see what values the registers currently have I see 0xfefefefe in all members. eg:

CTRL: 0xfefefefe
CMD: 0xfefefefe

This doesn't make any sense, to me. Do I have to do something extra to enable the registers to be read? If so does the spi_rom_api library take care of that setup?

Thanks
Nick

[lpcware]

Content originally posted in LPCWare by mc on Sat Feb 15 08:19:54 MST 2014
Hi Nick,
I think example from below link will help
http://www.lpcware.com/content/forum/how-use-libspifidrvm4-my-application

[lpcware]

Content originally posted in LPCWare by NickAtKandevsys on Fri Feb 14 11:19:26 MST 2014
Hi MC

My problem turned out to be a faulty reset circuit on the first prototype board resulting in various odd behaviour. I now have the code booting from SPIFI and it works as I had expected it to from the description in the manual.

I still need to look at the high speed mode as currently the clock is only running at 30MHz and the data sheet says it can go to 104MHz in serial mode and 80MHz in quad mode.

Thanks
Nick

[lpcware]

Content originally posted in LPCWare by mc on Thu Feb 13 22:07:00 MST 2014
Hi Nick,
How do you know that it is stuck in the boot loader? Can you put breakpoint at initialization of your code? Please also check that all boot pins have proper voltage. Please also initialize SPIFI pin in high speed mode. Code from below forum topic may be helpful.

http://www.lpcware.com/content/forum/how-use-libspifidrvm4-my-application