SPI Slave Read/Write program for LPC54114

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SPI Slave Read/Write program for LPC54114

1,321 Views
ericchan
Contributor I

Dear NXP,

I am designing a program of SPI Slave Read/Write and running on LPCXpress54114 board.
I tried to modify the SDK exmaple code (spi_interrupt) of LPCXpress54114. The Master SPI part is REM.
I put 0xF0, 0xF1, 0Fx2...... into srcBuff array and six bytes is read/write over SPI interface. (According to the Master clock from another side)
I suppose the Tx Data on SPI_MISO pin should be 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5.
But I found the Tx Data is 0xF0, 0xF0, 0xF1, 0xF2, 0xF3, 0xF4,
0xF0 is transmit two times and then 0xF1..... The attached is my modified code, and captured SPI waveform.
Please kindly take a look if I have done something wrong for my SPI slave code .
The CS pin is pulled to ground. And all SPI Rx data is correct.

Thanks,
Eric

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4 Replies

1,275 Views
gusarambula
NXP TechSupport
NXP TechSupport

Hello Eric,

Let me see the code. In the meantime, would you please confirm if this error is also present when running the example unchanged? Or did it appear only after the changes?

Regards,
Gustavo

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1,272 Views
ericchan
Contributor I

Dear Gustavo,

The SPI slave of the original example code only sending fixed dummy pattern (0xff) to the MISO line, (The code is shown below) but not getting data from srcBuff. So I have to modify the code in order to achieve the target. Please kindly help.

/* fill txFIFO with dummy pattern */
while (SPI_GetStatusFlags(EXAMPLE_SPI_SLAVE) & kSPI_TxNotFullFlag)
{
        SPI_WriteData(EXAMPLE_SPI_SLAVE, 0xFFFF, 0);
}

Thanks,
Eric

 

 

 

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1,244 Views
ericchan
Contributor I

Dear Gustavo,

Any update for my SPI question? Is there any working example code of SPI Slave for LPC54114 board which can success Tx and Rx data communicate with external SPI master device?  Please help.

Thanks,
Eric

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1,241 Views
xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Eric,

It appears that this is a bug of the slave SPI, the SPI FIFO filling leads to the issue.

I think you can try the workaround:

1)have the master SPI generate the timing to  toggle the /SSELx for each data frame.

2)you can fill the SPI FIFO with 8 dummy data on slave spi side, on the master side, delete the dummy data after receiving.

Hope it can help you

BR

XiangJun Rong

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