RT1176 multicore cm7/cm4 uart implementation

[dr2807]

Hi,

I made two standalone solutions with uarts  7 and  8 using interrupt interface, one for cm4 and one for cm7 core.

Each of them is working fine, but, when I port them on dual core environment, using dual core "hello world" example, uarts with interrupt system didn't work at all. 

Any idea what has to be changed on master/slave (cm7/cm4) configuration where standalone uart implementations with interrupts have to be ported on multicore?

I use MCUXpresso SDK, both cores are running what is visible with added printf commands using uart 1 (cm7) and uart 3 (cm4).  

thanks, 

[dr2807]

Hi,

Thanks for response,

In proposed example my intention was to apply complete process about using uarts in multicore configuration. 

So, I used dual core example simply to have working use case where both processors start in proper way, and, applications inside works.

So, on slave processor I updated board.h  file with setting DEBUG_CONSOLE_UART_INDEX to 3 . So slave processor cm4 use different port for printf function, and, I added PRINTF("S");  statement in main loop in slave processor. 

Till here everything worked fine, launched main processor, filled image for slave processor and kick it to work. So, from UART1 I got continuously "P" as in my example, and from slave processor I got "S" on UART3 (using EVK 1170). But here is catch, PRINTF works in blocking mode and does not use interrupts.

To see how interrupt system works, I tried to use timers with just counting time in interrupt routine, in both processors, and, also timers works properly in exposed example.

Next step was implementation of nonblocking interrupt transfer with UARTS. I used UART7 (cm4) and UART8 (cm7). Applying same configuration SW used for standalone configuration, and, found out that interrupt system doesn't worked. 

I tried this morning again to apply step by step approach as you recommended, to use  just cm7 and without cm4,  and check does it works, but without success.

During debugging process I find out that interrupts after configuration was not enabled even if function LPUART_TransferCreateHandle should enable interrupts, (in example it is between #if 1 > #endif) in file DBGuartDrv function DBGConfigUartReq . There I was forced again interrupt enabling what I am not sure is it correct as it somehow override usual process, with LPUART_EnableInterrupts(LPUART8, 0x8300000) and  with EnableIRQ(LPUART7_IRQn); but even this operation didn't help. 

Finally, I don't know where is the real problem as applied procedure in example, for interrupt supported data transfer via UART with dual core configuration, simply does not works. Trying to override interrupt enabling also didn't work. Anyway I would like to apply manufacturer best practice rules for using of UARTS with interrupts so I need help. 

thanks. 

[Alice_Yang]

Hello ,

I think this is a how to use "LPUART_TransferSendNonBlocking()" question, recommend you first refer to the UART_interrupt_transfer demo, it use the function of

LPUART_TransferSendNonBlocking().

BR

Alice

[dr2807 · Accepted solution]

Hi,

Seems that function LPUART_TransferSendNonBlocking works fine for applications where is used just one uart and on one core.

So, I made it in "old fashion" way with direct access to registers, and with writing complete driver SW from beginning, with writing complete code for supporting uart. I expected something that is off the shelf supporting multi-cores, ring buffer, non blocking transfer, etc.

Anyway, thanks for support.

rgds 

[Alice_Yang]

Hello,

Do you mean UART1 and UART3 work well, UART7 and UART8 doesn't.

Recommend first add only one UART to multicore demo , check and debug it to works well.

BR

Alice