Porting DMA DAC example to LPC17X8

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Porting DMA DAC example to LPC17X8

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christian_oster
Contributor I

Hello,

i would like to port the example mentioned in AN10917 to a LPC1788 controller.

According to the UM10470 there is no PLCC-Register in LPC1788's PLL0CON register...

This is the original code from the Application Note

void InitClock(void)
{
  // 1. Init OSC
  SCS_bit.OSCRANGE = 0;
  SCS_bit.OSCEN = 1;
  // 2.  Wait for OSC ready
  while(!SCS_bit.OSCSTAT);
  // 3. Disconnect PLL
  PLL0CON_bit.PLLC = 0;
  PLL0FEED = 0xAA;
  PLL0FEED = 0x55;
  // 4. Disable PLL
  PLL0CON_bit.PLLE = 0;
  PLL0FEED = 0xAA;
  PLL0FEED = 0x55;
  // 5. Select source clock for PLL
  CLKSRCSEL_bit.CLKSRC = 1; // Selects the main oscillator as a PLL clock source.
  // 6. Set PLL settings 300 MHz
  PLL0CFG_bit.MSEL = 25-1;
  PLL0CFG_bit.NSEL = 2-1;
  PLL0FEED = 0xAA;
  PLL0FEED = 0x55;
  // 7. Enable PLL
  PLL0CON_bit.PLLE = 1;
  PLL0FEED = 0xAA;
  PLL0FEED = 0x55;
  // 8. Wait for the PLL to achieve lock
  while(!PLL0STAT_bit.PLOCK);
  // 9. Set clk divider settings
  CCLKCFG   = 3-1;            // 1/3 Fpll
  PCLKSEL0 = PCLKSEL1 = 0;    // other peripherals 100/4 = 25MHz
  // 10. Connect the PLL
  PLL0CON_bit.PLLC = 1;
  PLL0FEED = 0xAA;
  PLL0FEED = 0x55;
}

And this is my try of porting it:

void InitClock(void)
{
  // 1. Init OSC
    LPC_SC->SCS &= ~(1 << 4);//OSCRANGE
    LPC_SC->SCS |= (1 << 5); //OSCEN

  // 2.  Wait for OSC ready
  while(!(LPC_SC->SCS & (1 << 6))); //OSCSTAT
  // 3. Disconnect PLL
  LPC_SC->PLL0CON &= ~(1 << 0);
  LPC_SC->PLL0FEED = 0xAA;
  LPC_SC->PLL0FEED = 0x55;
  // 4. Disable PLL
  LPC_SC->PLL0CON &= ~(1 << 0);
  LPC_SC->PLL0FEED = 0xAA;
  LPC_SC->PLL0FEED = 0x55;
  // 5. Select source clock for PLL
  LPC_SC->CLKSRCSEL |= 1; // Selects the main oscillator as a PLL clock source.
  // 6. Set PLL settings 300 MHz
  LPC_SC->PLL0CFG = 0x38;
  LPC_SC->PLL0FEED = 0xAA;
  LPC_SC->PLL0FEED = 0x55;
  // 7. Enable PLL
  LPC_SC->PLL0CON |= 1;
  LPC_SC->PLL0FEED = 0xAA;
    LPC_SC->PLL0FEED = 0x55;
  // 8. Wait for the PLL to achieve lock
    while(!(LPC_SC->PLL0STAT & (1 << 10)))
  // 9. Set clk divider settings
  LPC_SC->CCLKSEL |=   0x02;            // 1/3 Fpll
  LPC_SC->PCLKSEL = 0x04;    // other peripherals 100/4 = 25MHz
  // 10. Connect the PLL
  LPC_SC->PLL0CON |= 1;
  LPC_SC->PLL0FEED = 0xAA;
    LPC_SC->PLL0FEED = 0x55;
}

Can you tell me what changes i need to do, in order to use the example on the LPC1778/1788 ?

Thanks,

Christian

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jeremyzhou
NXP TechSupport
NXP TechSupport

Hi Christian Ostermeier ,

Thank you for your interest in NXP Semiconductor products and 
for the opportunity to serve you.
About the clock initialize implementation of the LPC1788, you can refer to the LPCOpen libarary for details.
Have a great day,

TIC

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