/*
===============================================================================
Name : main.c
Author : $(author)
Version :
Copyright : $(copyright)
Description : main definition
===============================================================================
*/
#include "board.h"
#include <cr_section_macros.h>
#define ADC_RATE (8000)
volatile uint32_t sct_counter;//count sct events
volatile uint32_t adc_counter;//count adc events
#ifdef __cplusplus
extern "C" {
#endif
//SCT0 is triggering ADC
void SCT0_IRQHandler(void)
{
if (LPC_SCT0->EVFLAG & SCT_EVT_0)
{
LPC_SCT0->EVFLAG = SCT_EVT_0;
Board_LED_Toggle(0);
sct_counter++;
}
}
void ADC0A_IRQHandler(void)
{
uint32_t pending;
/* Get pending interrupts */
pending = Chip_ADC_GetFlags(LPC_ADC0);
/* Sequence A completion interrupt */
if (pending & ADC_FLAGS_SEQA_INT_MASK) {
adc_counter++;
}
Board_LED_Toggle(1);
/* Clear any pending interrupts */
Chip_ADC_ClearFlags(LPC_ADC0, pending);
}
#ifdef __cplusplus
}
#endif
void SCT0_init(void)
{
Chip_SCT_Init(LPC_SCT0); /* The match/capture REGMODE defaults to match mode */
Chip_SCT_Config(LPC_SCT0, (SCT_CONFIG_32BIT_COUNTER | SCT_CONFIG_CLKMODE_BUSCLK)); /* Configure the SCT as a 32bit counter using the bus clock */
Chip_SCT_SetMatchCount(LPC_SCT0, SCT_MATCH_0, (SystemCoreClock/(ADC_RATE*2))-1); /* Set the match count for match register 0 */
Chip_SCT_SetMatchReload(LPC_SCT0, SCT_MATCH_0,(SystemCoreClock/(ADC_RATE*2))-1); /* Set the match reload value */
LPC_SCT0->STATE = 0;
LPC_SCT0->EVENT[0].STATE = (SCT_EVT_0);// events
LPC_SCT0->EVENT[0].CTRL = (0 << 0) | // use match register
(1 << 12) | // COMBMODE[13:12] = match condition
(1 << 14) | // STATELD[14] = STATEV is loaded
(0 << 15); // STATEV[19:15] =
LPC_SCT0->LIMIT = (1<<0);//limiting match register
LPC_SCT0->OUT[7].SET = (1 << 0); //set SCT0_OUTn with event
LPC_SCT0->OUT[7].CLR = (1 << 0); //clear SCT0_OUTn with event
LPC_SCT0->RES = (3 << (7<<1)); //conflict: toggle
Chip_SCT_EnableEventInt(LPC_SCT0,SCT_EVT_0); /* Enable an Interrupt on the Match Event */
NVIC_EnableIRQ(SCT0_IRQn);
Chip_SCT_ClearControl(LPC_SCT0, SCT_CTRL_HALT_L | SCT_CTRL_HALT_H);//and start
}
void ADC_init(void)
{
//PIN setup
//set PIO1.0 to ADC0.8
Chip_IOCON_PinMuxSet(LPC_IOCON, 1, 0, IOCON_MODE_INACT);
Chip_SWM_EnableFixedPin(SWM_FIXED_ADC0_8);
LPC_IOCON->PIO[1][0] = IOCON_MODE_INACT;
/* Setup ADC for 12-bit mode and normal power */
Chip_ADC_Init(LPC_ADC0, 0);
/* For ADC0, sequencer A will be used without threshold events.
It will be triggered by SCT0 out7 */
Chip_ADC_SetupSequencer(LPC_ADC0, ADC_SEQA_IDX, (ADC_SEQ_CTRL_CHANSEL(8) |
ADC0_SEQ_CTRL_HWTRIG_SCT0_OUT7 | ADC_SEQ_CTRL_MODE_EOS));
/* Use higher voltage trim for both ADCs */
Chip_ADC_SetTrim(LPC_ADC0, ADC_TRIM_VRANGE_HIGHV);
/* Need to do a calibration after initialization and trim */
Chip_ADC_StartCalibration(LPC_ADC0);
while (!(Chip_ADC_IsCalibrationDone(LPC_ADC0))) {}
/* Setup for maximum ADC clock rate */
Chip_ADC_SetClockRate(LPC_ADC0, ADC_MAX_SAMPLE_RATE);
/* Clear all pending interrupts */
Chip_ADC_ClearFlags(LPC_ADC0, Chip_ADC_GetFlags(LPC_ADC0));
/* Enable sequence A completion interrupts for ADC0 */
Chip_ADC_EnableInt(LPC_ADC0, ADC_INTEN_SEQA_ENABLE);
/* Enable related ADC NVIC interrupts */
NVIC_EnableIRQ(ADC0_SEQA_IRQn);
/* Enable sequencers */
Chip_ADC_EnableSequencer(LPC_ADC0, ADC_SEQA_IDX);
}
int main(void)
{
SystemCoreClockUpdate();
Board_Init();
Board_LED_Set(0, true);
SCT0_init();
ADC_init();
while(1)
{
}
return 0 ;
}
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