Content originally posted in LPCWare by waleed on Tue Apr 14 01:24:23 MST 2015
I want to debug bare metal application on both cores of NXP LPC54102 board.
My application for m4 core contains boot address and stack address for m0+ core.Thus my application for m4 core is setting up the environment for m0+ core.
I first connect to m4 core and start a debugging session on it and insert breakpoints at different locations, my m4 application set coprocessor stack and coprocessor boot reg, resets m0+ core and enable it's clock by writing to cpu control register.After this i connect to m0+ core and start a debug session on it and insert breakpoints at different locations.
Now if i give "c" command from GDB in m4 debugging session, i am able to hit all of my breakpoints and debugging works fine.But as soon as i give "c" command in m4 debugging session and after this i give "c" command in m0+ debugging session i get following error from GDB:
(gdb) c
continuing.
Program received signal SIGTRAP, Trace/breakpoint trap.
0xfffffffe in ?? ()
Any suggestion what am i doing wrong?