Masked port output.

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Masked port output.

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lpcware
NXP Employee
NXP Employee
Content originally posted in LPCWare by JulianCox on Fri May 13 08:06:52 MST 2016
I have read a number of posts on this subject, but one thing is not clear. I wish to output data to a 7-bit port. I have initialised the port, but the pins are [u]not contiguous[/u] due to board layout constraints.
To output data do I simply send a 7 (or 8) bit value using the instruction Chip_GPIO_SetMaskedPortValue(LPC_GPIO_PORT, 0, value);
or must I map the individual bits onto a 32-bit word to match up with the mask bits. If this is the case it would take longer to shift the bits than it would to set the port pins one at a time.
As a simple example using  8-bit registers. I set the mask for port pins 0, 2, 4 and 6. I wish to output  a value of 00001111 which is 15. Do I pass a value of 15 to Chip_GPIO_SetMaskedPortValue(); or do I have to send the value 01010101 (which is 85)?

Also, is Chip_GPIO_SetMaskedPortValue(); the correct instruction as I have seen other instructions used for this purpose in various posts on this forum?
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lpcware
NXP Employee
NXP Employee
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lpcware
NXP Employee
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Content originally posted in LPCWare by IanB on Sat May 14 03:52:22 MST 2016
My sentiments exactly - you could implement an 8-bit port on an 8048, you can on most Microchip parts and most Atmel parts.
You need an LPC15 before you can on an NXP device, and even then they spoil it on the 48-pin device by putting an ISP reset pin halfway along.

Best way to implement an 8-bit output port is with a 74HC595 on the SPI output! Or a Microchip MCP23017 if you need both input and output.
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lpcware
NXP Employee
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Content originally posted in LPCWare by JulianCox on Sat May 14 03:13:11 MST 2016
Thanks for answering my question. Who would have thought that, with such a sophisticated device, there was no simple way to implement an eight-bit I/O port. 
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lpcware
NXP Employee
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Content originally posted in LPCWare by IanB on Fri May 13 13:57:44 MST 2016
You have to send 0b01010101.

Easiest way to do it (if you need speed) is a look-up table.

There has been a lot of criticism of NXP in these fora for the random arrangement of the pins. What was wrong with putting them in a sensible order? - they managed it on the 8051!
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