Hello everyone!
I have some confusing thing. GPDMA transfers and receives some data over SSP0. Everything works perfectly well. No data lost. But sometimes, if there is long processor activity (memset for big data array, or just empty loop to make short delay, not mine, in cmsis library), SSP sets RORRIS flag in RIS (Raw Interrupts Status) register. It means, DMA can't receive data for specific time. I think processor takes all buses, so DMA can't access to them for some period. I read user manual over and over again. I couldn't find any clarification for the question. So, can I say to MCU that he must stop shile DMA does his great work???
Hi Yakimov,
Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.
It seems so weird, as we know, DMA is designed to unloading the MCU working which makes them can work simultaneously.
I was wondering if you can share a simple demo, then I can replicate the phenomenon and it's helpful for me to figure it out.
Have a great day,
TIC
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Hi!
Sorry for a long reply, I was very busy and didn't see the forum.
I can't share demo, as our project is very big, containing FreeRTOS, and hardware-specific features. It seems very difficult to clean it((( Ok, as I understand GPDMA and CPU can't block each other. So I'm going to fix it by myself))